IP Library Granted Patent US 7,596,634
Granted Patent B2
US 7,596,634 · App. 10/352,800 · Granted Sep 29, 2009

Networked application request servicing offloaded from host

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Quick Facts
Patent No.
US 7,596,634
App. No.
10/352,800
Granted
Sep 29, 2009
Kind
B2
Abstract

Offloading application level communication functions from a host processor. The offloading apparatus can be configured as either a pre-processor or as a co-processor. An interface is provided for receiving a network message sent to the host. An engine performs processing of the network message above OSI level 4. In one embodiment, in a fast-path, a response to the message is sent back to the network without any involvement by the host, providing a complete offload. For other messages, certain pre-processing can be performed, such as parsing of a header, message authentication, and look-up of meta-data. The results of the look-up are then passed to the host with the processed header, simplifying the tasks the host needs to perform. The messages and data are transferred to the host using control and data buffers.

Claims (43)

1. A processor, coupled to a host and to a receive mechanism, the processor comprising:

a first interface configured to receive a network message sent to said host, wherein said network message has already been processed in OSI levels 1-4 by said receive mechanism;

an engine configured to perform at least some processing of said network message above OSI level four; and

a second interface configured to provide results of said processing to said host.

2. The processor of claim 1 further comprising: a third interface configured to provide said results to a remote processor other than said host.

3. The processor of claim 1 wherein said processor is a pre-processor, said first interface is an interface to a TCP-IP offload engine, and said second interface is an interface to said host.

4. The processor of claim 1 wherein said processor is a co-processor and said first and second interfaces are part of a host interface.

5. The processor of claim 1 further comprising: a cache memory interface; and wherein said processor is configured to access meta data in a cache memory.

6. The processor of claim 5 wherein said processor is further configured to access data in said cache memory.

7. The processor of claim 1 wherein said processor is further configured to look-up meta data, and pass said meta data to said host.

8. The processor of claim 1 wherein said processor is further configured to parse a header in said message.

9. The processor of claim 1 further comprising an interface to a co-processor.

10. The processor of claim 9 wherein said co-processor is a security processor.

11. The processor of claim 1 wherein said engine is configured to completely process and return certain messages without forwarding said certain messages to said host.

12. The processor of claim 1 wherein said engine is configured to communicate with said host by writing to and reading from a commonly accessible control and data buffer.

13. A processor, coupled to a host, comprising:

a first interface configured to receive network messages sent to said host;

an engine configured to perform all processing of certain of said network messages above OSI level four; and

wherein said engine is further configured to completely process and return said certain of said network messages without forwarding said certain messages to said host.

14. The processor of claim 13 wherein at least one of said certain of said network messages involve accessing of meta data, but not data pointed to by said meta data.

15. The processor of claim 13 wherein said processor is a pre-processor, processor, said first interface is an interface to a TCP-IP offload engine, and further comprising a second interface to said host.

16. The processor of claim 13 wherein said processor is a co-processor, and said first interface is part of a host interface.

17. The processor of claim 13 further comprising: a cache memory interface; and wherein said processor is configured to access meta data in a cache memory.

18. The processor of claim 17 wherein said processor is further configured to access data in said cache memory.

19. The processor of claim 13 wherein said processor is configured to look-up meta data, and return said meta data to an originator of said network message.

20. The processor of claim 13 wherein said processor is further configured to parse a header in said message.

21. The processor of claim 13 further comprising an interface to a co-processor.

22. The processor of claim 21 wherein said co-processor is a security processor.

23. A pre-processor, coupled to a host, comprising:

a TCP-W offload engine (TOE) configured to perform TCP and IP processing on a network message sent to said host;

an engine configured to perform at least some processing of said network message above OSI level four, including accessing meta data in a cache memory and parsing a header in said message;

a host interface configured to provide results of said processing to said host; and

a cache memory interface.

24. The pre-processor of claim 10 wherein said engine is configured to pass certain messages between said TOE and said host without modification so that said pre-processor is transparent to said TOE.

25. A host comprising:

a first processor;

a network interface including a TCP/IP offload engine (TOE);

a second processor configured to receive messages from said TOE including a processed header above OSI level four and meta data looked up by said first processor;

said first processor being further configured to respond to said message using said processed header and said looked up meta data.

26. The host of claim 25 further comprising:

a first driver configured to communicate with said first processor; and

a second driver configured to communicate with said TOE.

27. The host of claim 26 wherein said second driver is configured to communicate with said TOE through said first processor.

Assignments (10)
PATENT SECURITY AGREEMENT Recorded Aug 6, 2024
From: RPX CORPORATION; RPX CLEARINGHOUSE LLC
To: BARINGS FINANCE LLC, AS COLLATERAL AGENT
Reel/Frame 068328/0674 →
RELEASE OF LIEN ON PATENTS Recorded Aug 5, 2024
From: BARINGS FINANCE LLC
To: RPX CORPORATION
Reel/Frame 068328/0278 →
RELEASE OF SECURITY INTEREST Recorded Oct 26, 2020
From: JEFFERIES FINANCE LLC
To: RPX CORPORATION
Reel/Frame 054486/0422 →
PATENT SECURITY AGREEMENT Recorded Oct 23, 2020
From: RPX CLEARINGHOUSE LLC; RPX CORPORATION
To: BARINGS FINANCE LLC, AS COLLATERAL AGENT
Reel/Frame 054198/0029 →
PATENT SECURITY AGREEMENT Recorded Oct 23, 2020
From: RPX CLEARINGHOUSE LLC; RPX CORPORATION
To: BARINGS FINANCE LLC, AS COLLATERAL AGENT
Reel/Frame 054244/0566 →
SECURITY INTEREST Recorded Jun 29, 2018
From: RPX CORPORATION
To: JEFFERIES FINANCE LLC
Reel/Frame 046486/0433 →
RELEASE (REEL 038041 / FRAME 0001) Recorded Jan 2, 2018
From: JPMORGAN CHASE BANK, N.A.
To: RPX CORPORATION; RPX CLEARINGHOUSE LLC
Reel/Frame 044970/0030 →
SECURITY AGREEMENT Recorded Mar 9, 2016
From: RPX CORPORATION; RPX CLEARINGHOUSE LLC
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038041/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 16, 2014
From: NEXSIL COMMUNICATIONS, INC.
To: RPX CORPORATION
Reel/Frame 033752/0180 →
PATENT ASSIGNMENT AND LICENSE AGREEMENT Recorded Jul 5, 2012
From: ALACRITECH, INC.
To: NEXSIL COMMUNICATIONS, INC.
Reel/Frame 028502/0970 →