IP Library Granted Patent US 6,859,095
Granted Patent B2
US 6,859,095 · App. 10/356,650 · Granted Feb 22, 2005

Non-switched capacitor offset voltage compensation in operational amplifiers

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Quick Facts
Patent No.
US 6,859,095
App. No.
10/356,650
Granted
Feb 22, 2005
Kind
B2
Abstract

A method for reducing offset voltage in an operational amplifier without the need for switched-capacitors, includes introducing a tapped resistor chain between the common connected terminals of the transistors of the input differential pair of the operational amplifier and connecting the tail current source/sink of the differential amplifier to a selected tap of the resistor chain. The invention further provides an improved operational amplifier in accordance with the above method.

Claims (17)

1. A method for reducing offset voltage in an operational amplifier without the need for switched-capacitors, external offset-correction resistors, precise matching between the internal components of the operational amplifier or analog characterization of the fabrication process, said method not resulting in any increase in the static current consumption of the operational amplifier and comprising the steps of:

introducing a tapped resistor chain between the common connected terminals of the transistors of the input differential pair of the operational amplifier and connecting the tail current source/sink of the differential amplifier to a selected tap of the resistor chain,

operating periodically or whenever desired, the operational amplifier in a calibration mode when the input terminals of the input differential amplifier are disconnected from the input terminals of the operational amplifier and connected to the same common-mode internal reference voltage point,

monitoring the final output voltage and adjusting the selection of the tap in the resister chain to which the tail current source/sink is connected in the input differential amplifier in order to minimize the value of the final offset voltage, and

storing the final tap selection and reconnecting the input differential amplifier inputs to the operational amplifier input terminals for resuming normal operation.

2. A method as claimed in claim 1 wherein the calibration mode includes disconnecting the internal phase compensation circuitry, if any, and said operating operational amplifier in open loop mode, as a comparator to provide minimum delay.

3. A method as claimed in claim 1 wherein the selection of said tap in the resistor chain during the calibration mode is automatically performed using any known successive approximation technique.

4. A method as claimed in claim 1 including the use of a single resistor strip with side contacts for said taps, so as to minimize inaccuracies due to finite contact resistances.

5. An improved operational amplifier providing reduced offset voltage without the need for switched-capacitor circuitry, external offset adjustment resistors, tightly matched internal components, or a fabrication process characterized for analog parameter, said improved operational amplifier not consuming any additional static current, and comprising:

an input differential amplifier incorporating a tapped resistor chain connected between the common-connected terminals of the transistors of the input differential amplifier with the current source/sink output connected to a selected one of said taps,

mechanism for operating said operational amplifier in a calibration mode either periodically or whenever desired,

means for disconnecting the inputs of said input differential amplifier from the inputs of said operational amplifier, and connecting them to the same common-mode internal reference voltage, during said calibration mode,

means for monitoring the output voltage and adjusting the selection of said tap in said resistor chain such that the offset voltage is minimized, and

mechanism for storing the selection of said resistor tap and reconnecting the inputs of said input differential amplifier to the input terminals of said operational amplifier, for resuming normal operation.

6. An improved operational amplifier as claimed in claim 5 wherein means for disconnecting phase compensation circuitry, if any, and operating said operational amplifier as a comparator during the calibration mode are provided, so as to minimize delay.

7. An improved operational amplifier as claimed in claim 5 wherein said mechanism for automatically determining tap selection in the resistor chain is any known successive approximation technique.

8. An improved operational amplifier as claimed in claim 5 wherein said tapped resistor chain is made using a single resistor strip with side taps, so as to minimize inaccuracies due to finite contact resistances.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Aug 19, 2024
From: UBS AG, STAMFORD BRANCH
To: ALLIANCE LAUNDRY SYSTEMS, LLC
Reel/Frame 068329/0364 →
SECURITY INTEREST Recorded Aug 19, 2024
From: ALLIANCE LAUNDRY SYSTEMS LLC
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 068329/0667 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2004
From: NANDY, TAPAS; RATHORE, KIRTIMAN SINGH
To: STMICROELECTRONICS PVT. LTD.
Reel/Frame 015132/0845 →