Apparatus and method for verification of system interconnect upon hot-plugging of electronic field replaceable units
View Patent ↗A field unit has a connector with first and second interconnect apparatus coupled to connector. The field replaceable unit has test apparatus coupled to the first and second interconnect apparatus capable of testing connections through the connector to the first interconnect apparatus under control of signals on the second interconnect apparatus. The field replaceable unit is capable of being hot-plugged. In an embodiment, the second interconnect apparatus is of the JTAG type. Also claimed is a method of testing interconnect between the field replaceable unit and another unit of a system into which it has been hot-plugged.
1. A method of testing interconnect between a first field replaceable unit and a second unit of a system comprising the steps of:
inserting the first field replaceable unit into a connector of the system, the first field replaceable unit having a high speed interconnect interface and a test interconnect;
detecting insertion of the first field replaceable unit;
verifying an ability of the first field replaceable unit to receive signals from a second unit of the system through its high speed interconnect interface; and
verifying an ability of the first field replaceable unit to transmit signals to the second unit of the system through its high speed interconnect interface.
2. The method of claim 1 , wherein the steps of verifying an ability of the first field replaceable unit to receive signals from the second unit of the system through its high speed interconnect interface and verifying an ability of the first field replaceable unit to transmit signals to the second unit of the system are performed through a JTAG interface to the high speed interconnect interface of the first field replaceable unit.
3. The method of claim 1 , wherein the steps of verifying an ability of the first field replaceable unit to receive signals from the second unit of the system through its high speed interconnect interface and verifying an ability of the first field replaceable unit to transmit signals to the second unit of the system are performed by a management processor through a JTAG interface to the high speed interconnect interface of the first field replaceable unit and through a JTAG interface to a high speed interconnect interface of the second field replaceable unit.
4. The method of claim 3 , wherein error correction coding of the high speed interconnect interface of the field replaceable unit is disabled during the step of verifying an ability of the first field replaceable unit to transmit signals to a second unit of the system.
5. The method of claim 1 further comprising the steps of:
inserting a daughter field replaceable unit into a connector of the first field replaceable unit, the daughter field replaceable unit having a high speed interconnect interface and a test interconnect;
verifying an ability of the first field replaceable unit to receive signals from the daughter field replaceable unit; and
verifying an ability of the first field replaceable unit to transmit signals to the daughter field replaceable unit.
6. The method of claim 5 , wherein the steps of verifying an ability of the first field replaceable unit to receive signals from a second unit of the system and verifying an ability of the first field replaceable unit to transmit signals to the second unit of the system are performed under control of a management processor of the system.
7. The method of claim 1 , wherein the step of verifying an ability of the first field replaceable unit to receive signals from a second unit of the system through its high speed interconnect interface further comprises the step of having the second unit of the system arbitrate for a bus, the bus being coupled to the high speed interconnect interface of the first and second field replaceable units.