IP Library Granted Patent US 6,922,045
Granted Patent B2
US 6,922,045 · App. 10/365,432 · Granted Jul 26, 2005

Current driver and method of precisely controlling output current

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Quick Facts
Patent No.
US 6,922,045
App. No.
10/365,432
Granted
Jul 26, 2005
Kind
B2
Abstract

Disclosed is current driver circuit comprising a bandgap reference circuit for generating a fixed current and a current proportional to absolute temperature (PTAT), a temperature compensator for combining the fixed and PTAT currents and forming first and second temperature compensated currents, a current control circuit for modifying said first and second temperature compensated currents in response to signals representing the characteristics of a load device and a driver circuit for amplifying and supplying a selected one of said first and second temperature compensated currents to said load device. Also disclosed is a method of supplying a precisely controlled current by generating a constant current and a current proportional to absolute temperature (PTAT), combining these two currents and providing temperature compensated currents, modifying the temperature compensated currents with a programmed reference signal and supplying a precisely controlled current to a load device.

Claims (50)

1. A method of supplying a precisely controlled current, comprising the steps of:

generating at least one first current that is constant with temperature;

generating at least one second current that is proportional to temperature;

combining said first and second currents forming a temperature compensated third current;

modifying said third current with at least one programmed reference signal to provide at least one precisely controlled reference current; and

selectively gating said precisely controlled reference current to a load device having a variable slope characteristic.

2. A method as in claim 1 further comprising:

supplying a voltage resulting from said precisely controlled current to a fault detection device;

comparing said voltage with a reference voltage; and

disabling current flow to said control device if the difference between said voltage and said reference voltage exceeds a predetermined value.

3. A method as in claim 1 wherein said at least one first and second current values are approximately equal at 25 degrees centigrade.

4. A method as in claim 1 wherein generating said at least one second current is performed by at least two temperature sensitive transistors having different dimensions.

5. A method as in claim 4 wherein at least one of said two temperature sensitive transistors is placed in physical proximity to a load device, thereby approximating the temperature of the load device.

6. A method as in claim 1 , wherein combining said first and second currents comprises:

subtracting the first current from the second current and multiplying the resulting difference by a factor M; and

adding the current obtained in the foregoing step to the first current.

7. A method as in claim 6 wherein the factor M is a binary word.

8. A method as in claim 1 wherein in the step of modifying the third current with at least one programmed reference signal, the reference signal is a binary word.

9. A method as in claim 1 , wherein the at least one precisely controlled reference current represents the minimum current required to optically generate a binary “0” and further composing the step of providing a fourth current representing the maximum current required to optically generate a binary “1”, wherein said third and fourth currents are each independently modified to provide two precisely controlled currents.

10. A method as in claim 9 wherein in selectively gating said precisely controlled current to a load device comprises: selectively gating one of said two precisely controlled currents to said load device.

11. A method as in claim 1 wherein said load device is a vertical cavity surface emitting laser (VCSEL).

12. A current driver circuit for supplying a precisely controlled current, comprising:

a bandgap reference circuit for generating a fixed current and a current proportional to absolute temperature (PTAT);

a temperature compensator for combining said fixed and PTAT currents and forming first and second temperature compensated currents;

a current control circuit for modifying said first and second temperature compensated currents in response to signals representing the characteristics of a load device; and

a driver circuit for amplifying and supplying a selected one of said first and second temperature compensated currents to said load device.

13. A current driver circuit as in claim 12 wherein said load device comprises: a vertical cavity surface emitting laser (VCSEL).

14. A current driver circuit as in claim 13 wherein said load device comprises: a plurality of vertical cavity surface emitting lasers (VCSEL)s.

15. A current driver circuit as in claim 12 , wherein said bandgap reference circuit also generates a reference voltage and further comprising:

fault detection circuit receiving said reference voltage and said selected one of said first and second temperature compensated currents;

said fault detection circuit providing an error signal when said selected one of said first and second temperature compensated current generates a voltage that differs from the reference voltage by more than a predetermined value.

16. A current driver circuit as in claim 12 , wherein said bandgap reference circuit comprises:

at least two temperature variant transistors having different dimensions for generating the current proportional to absolute temperature (PTAT).

17. A current driver circuit as in claim 12 , wherein said temperature compensator comprises:

first and second transistors having dimensions in a ratio of two to one and providing an output having one of four possible output values determined by the binary state of the input signals received by said first and second transistors.

18. A current driver circuit as in claim 12 , wherein said current control circuit comprises:

a plurality of transistors having dimensions in a fixed ratio with respect to each other and providing an output having one of a plurality of precisely controlled output values determined by the binary state of the input signals received by said plurality of transistors.

19. A current driver circuit as in claim 12 , wherein said driver circuit comprises:

a first transistor for receiving a high side input signal;

a second transistor for receiving a low side input signal; and

a output transistor operating in saturation mode and providing an amplified temperature compensated current to said load device.

20. A current driver circuit as in claim 12 , wherein said driver circuit comprises:

a first transistor for receiving a high side input signal;

a second transistor for receiving a low side input signal; and

a output transistor operating in saturation mode and providing an amplified temperature compensated current that is a maximum current to said load device when said second transistor is in a non-conducting state.

21. A current driver circuit as in claim 12 , wherein said driver circuit comprises:

a first transistor for receiving a high side input signal;

a second transistor for receiving a low side input signal; and

an output transistor operating in saturation mode and providing an amplified temperature compensated current having a value that is a maximum current minus a minimum current to said load device when said second transistor is in a conducting state.

22. A method as in claim 1 , further comprising the step of: amplifying said precisely controlled current.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2021
From: COSEMI TECHNOLOGIES, INC.
To: MOBIX LABS, INC.
Reel/Frame 057499/0354 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 2, 2021
From: COSEMI TECHNOLOGIES, INC.
To: MOBIX LABS, INC.
Reel/Frame 057368/0524 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 1, 2016
From: TYCO ELECTRONICS SERVICES GMBH
To: COSEMI TECHNOLOGIES, INC.
Reel/Frame 040487/0223 →
CORRECTIVE ASSIGNMENT TO REMOVE SECOND ASSIGNEE PREVIOUSLY RECORDED ON REEL 026272, FRAME 0772 Recorded Jul 7, 2011
From: ZARLINK SEMICONDUCTOR INC.; ZARLINK SEMICONDUCTOR AB
To: TYCO ELECTRONICS SERVICES GMBH
Reel/Frame 026619/0271 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 10, 2011
From: ZARLINK SEMICONDUCTOR INC; ZARLINK SEMICONDUCTOR AB
To: TYCO ELECTRONICS SERVICES GMBH; GOLDCUP 5514 AB UNAT TYCO ELECTRONICS SVENSKA HOLDINGS AB
Reel/Frame 026272/0772 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2006
From: PRIMARION, INC.
To: ZARLINK SEMICONDUCTOR INC.
Reel/Frame 018407/0840 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 13, 2003
From: SELF, DAVID W.; MCCLAY, C. PHILLIP
To: PRIMARION, INC.
Reel/Frame 014292/0954 →