IP Library Granted Patent US 7,265,416
Granted Patent B2
US 7,265,416 · App. 10/366,545 · Granted Sep 4, 2007

High breakdown voltage low on-resistance lateral DMOS transistor

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Quick Facts
Patent No.
US 7,265,416
App. No.
10/366,545
Granted
Sep 4, 2007
Kind
B2
Abstract

In accordance with the present invention, a metal oxide semiconductor (MOS) transistor has a substrate of a first conductivity type. A drift region of a second conductivity type extends over the substrate. A body region of the first conductivity type is in the drift region. A source region of the second conductivity is in the body region. A gate extends over a surface portion of the body region. The surface portion of the body region extends between the source region and the drift region to form a channel region of the transistor. A drain region of the second conductivity type is in the drift region. The drain region is laterally spaced from the body region. A first buried layer of the second conductivity type is between the substrate and drift region. The first buried layer laterally extends from under the body region to under the drain region. A second buried layer of the first conductivity type is between the first buried layer and the drift region. The second buried layer laterally extends from under the body region to under the drain region.

Claims (40)

1. A metal oxide semiconductor (MOS) transistor comprising:

a substrate of a first conductivity type;

a drift region of a second conductivity type over the substrate;

a body region of the first conductivity type in the drift region;

a source region of the second conductivity type in the body region;

a gate extending over a surface portion of the body region, the surface portion of the body region extending between the source region and the drift region to form a channel region of the transistor;

a drain region of the second conductivity type in the drift region, the drain region being laterally spaced from the body region;

a first buried layer of the second conductivity type between the substrate and drift region, the first buried layer laterally extending from under the body region to under the drain region; and

a second buried layer of the first conductivity type laterally extending from under the body region to under the drain region and not beyond the first buried layer, wherein directly under the body region, the second buried layer is between the first buried layer and the body region.

2. The MOS transistor of claim 1 further comprising an epitaxial layer of a second conductivity type over the substrate, the drift region being formed in the epitaxial layer.

3. The MOS transistor of claim 1 further comprising:

a body-contact region of the first conductivity type in the body region; and

a deep region of the first conductivity type vertically extending from under the source and body-contact regions through the drift region and terminating in the second buried layer.

4. The MOS transistor of claim 1 further comprising a field oxide between the body and drain regions, the gate extending over a portion of the field oxide.

5. The MOS transistor of claim 4 wherein the field oxide is adjacent the drain region but is laterally spaced from the body region.

6. The MOS transistor of claim 1 wherein the first buried layer forms a junction with each of the substrate, the drift region, and the second buried layer.

7. The MOS transistor of claim 1 wherein the second buried layer forms a junction with each of the first buried layer and the drift region.

8. The MOS transistor of claim 1 further comprising:

a drain electrode contacting the drain region;

a source electrode contacting the source region; and

an interlayer dielectric layer electrically isolating the gate, the source electrode, and the drain electrode from one another.

9. The MOS transistor of claim 1 wherein the first conductivity type is p-type and the second conductivity type is n-type.

10. The MOS transistor of claim 1 wherein the deep region and the body-contact region have a higher doping concentration than the body layer and the second buried layer.

11. The MOS transistor of claim 1 wherein the drain and source regions have a higher doping concentration than the drift region and the first buried layer.

12. A metal oxide semiconductor (MOS) transistor comprising:

a substrate of a first conductivity type;

drift region of a second conductivity type over the substrate;

a body region of the first conductivity type in the drift region;

a source region of the second conductivity type in the body region;

a gate extending over a surface portion of the body region, the surface portion of the body region extending between the source region and the drift region to form a channel region of the transistor;

a drain region of the second conductivity type in the drift region, the drain region being laterally spaced from the body region;

a first buried layer of the second conductivity type between the substrate and drift region, the first buried layer laterally extending at least from directly under the body region to under the drain region; and

a second buried layer of the first conductivity type laterally extending at least from directly under the body region to under the drain region, the second buried layer between the first buried layer and the body region directly under the body region.

13. The MOS-gated transistor of claim 12 wherein the first conductivity type is p-type and the second conductivity type is n-type.

14. The MOS-gated transistor of claim 12 wherein the first conductivity type is n-type and the second conductivity type is p-type.

15. The MOS-gated transistor of claim 12 further comprising an epitaxial layer of a second conductivity type over the substrate, a well region being formed in the epitaxial layer.

16. The MOS-gated transistor of claim 12 wherein the first buried layer forms a junction with each of the substrate, a well region, and the second buried layer.

17. The MOS-gated transistor of claim 12 wherein the second buried layer forms a junction with each of the first buried layer and a well region.

18. The MOS-gated transistor of claim 12 further comprising a body contact region of the first conductivity type in the body region.

19. The MOS-gated transistor of claim 12 further comprising a sinker region of the first conductivity type extending from a body contact region to the second buried layer.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 046530, FRAME 0460 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064075/0001 →
PATENT SECURITY AGREEMENT Recorded Jul 11, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 046530/0460 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2017
From: FAIRCHILD KOREA SEMICONDUCTOR, LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 044361/0205 →