IP Library Granted Patent US 6,858,867
Granted Patent B2
US 6,858,867 · App. 10/369,756 · Granted Feb 22, 2005

Channel-etch thin film transistor

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Quick Facts
Patent No.
US 6,858,867
App. No.
10/369,756
Granted
Feb 22, 2005
Kind
B2
Abstract

A channel-etch thin film transistor having a source electrode including a source electrode primary portion and a source electrode lead portion and a drain electrode including a drain electrode primary portion and a drain electrode lead portion. At least one of the source electrode lead portion and the drain electrode lead portion has a side-contact portion in contact directly with a side wall of the active layer. An averaged width of the side-contact portion is narrower than an averaged width of corresponding one of the source electrode primary portion and the drain electrode primary portion.

Claims (17)

1. A channel-etch thin film transistor including:

a gate electrode over a substrate;

a gate insulation film extending over said gate electrode and said substrate;

an active layer including a channel region over said gate insulation film;

source and drain regions on said active layer;

a source electrode connected with said source region, and said source electrode including a source electrode primary portion in contact with said source region and a source electrode lead portion extending from said source electrode primary portion; and

a drain electrode connected with said drain region, and said drain electrode including a drain electrode primary portion in contact with said drain region and a drain electrode lead portion extending from said drain electrode primary portion,

wherein at least one of said source electrode lead portion and said drain electrode lead portion has a side-contact portion in contact directly with a side wall of said active layer, and an averaged width of said side-contact portion is narrower than an averaged width of corresponding one of said source electrode primary portion and said drain electrode primary portion.

2. The channel-etch thin film transistor as claimed in claim 1 , wherein each of said source electrode lead portion and said drain electrode lead portion has said side-contact portion in contact directly with said side wall of said active layer, and said averaged width of said side-contact portion is narrower than said averaged width of each of said source electrode primary portion and said drain electrode primary portion.

3. The channel-etch thin film transistor as claimed in claim 1 , wherein a peripheral edge of said gate electrode is positioned outside of a peripheral edge of said active layer in plan view.

4. The channel-etch thin film transistor as claimed in claim 1 , wherein said substrate comprises a glass substrate of a liquid crystal display, and said source electrode is connected to a pixel electrode, and said drain electrode is connected to a data line.

5. The channel-etch thin film transistor as claimed in claim 1 , wherein said side-contact portion is narrower in width than an end portion of said corresponding one of said source electrode primary portion and said drain electrode primary portion, and said end portion confronts counterpart one of said source electrode primary portion and said drain electrode primary portion.

6. The channel-etch thin film transistor as claimed in claim 5 , wherein at least one of said source electrode primary portion and said drain electrode primary portion has a wide region which has the same width as said end portion and a length of at least 3 micrometers along a channel length direction.

7. The channel-etch thin film transistor as claimed in claim 1 , wherein said source electrode primary portion and said drain electrode primary portion are symmetrical in view of plan view.

8. The channel-etch thin film transistor as claimed in claim 7 , wherein both of said source electrode lead portion and said drain electrode lead portion have side-contact portions in contact directly with said side walls of said active layer, and each of said side-contact portions is narrower than each of said source electrode primary portion and said drain electrode primary portion.

9. The channel-etch thin film transistor as claimed in claim 1 , wherein said source electrode primary portion and said drain electrode primary portion are asymmetrical in view of plan view.

10. The channel-etch thin film transistor as claimed in claim 9 , wherein said drain electrode lead portion has a side-contact portion in contact directly with said side wall of said active layer, said side-contact portion of said drain electrode lead portion is narrower than said drain electrode primary portion, and said source electrode primary portion is narrower than said drain electrode primary portion, and said source electrode lead portion has another side-contact portion having a width narrower than or equal to said source electrode primary portion.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 14, 2023
From: GOLD CHARM LIMITED
To: HANNSTAR DISPLAY CORPORATION
Reel/Frame 063321/0136 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 21, 2013
From: NEC CORPORATION
To: GOLD CHARM LIMITED
Reel/Frame 030059/0319 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 7, 2010
From: NEC LCD TECHNOLOGIES, LTD.
To: NEC CORPORATION
Reel/Frame 024492/0176 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 12, 2005
From: NEC CORPORATION
To: NEC LCD TECHNOLOGIES, LTD.
Reel/Frame 015891/0067 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2003
From: OKUMURA, HIROSHI
To: NEC CORPORATION
Reel/Frame 014063/0531 →