IP Library Granted Patent US 7,000,158
Granted Patent B2
US 7,000,158 · App. 10/373,265 · Granted Feb 14, 2006

Simplifying verification of an SFI converter by data format adjustment

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Quick Facts
Patent No.
US 7,000,158
App. No.
10/373,265
Granted
Feb 14, 2006
Kind
B2
Abstract

The present invention enables interface conversion verification with a single chip and improves problem isolation. Exemplary embodiments of the present invention can provide this by modifying the input data pattern (e.g., creating a 40G, or pseudo OC-768, frame by multiplexing four OC-192 frames, two bytes at a time) to provide per port demultiplexing of data streams at the output of the interface converter.

Claims (31)

1. A method for testing a data communication device that normally operates on an input data stream including a plurality of data channels timewise interleaved according to a first format, comprising:

providing test input data corresponding to each of the data channels;

generating from the test input data a test input data stream wherein the data channels are timewise interleaved according to a second format that differs from said first format;

applying the test input data stream to the data communication device;

receiving from the data communication device a test output data stream produced by the data communication device in response to the test input data stream; and

using the test output data stream to verify operation of the data communication device.

2. The method of claim 1 , wherein said first format is OC-768 format.

3. The method of claim 1 , wherein said second format is 40G format.

4. The method of claim 3 , wherein said first format is OC-768 format.

5. The method of claim 1 , wherein said receiving step includes receiving in parallel a plurality of said test output data streams produced by the data communication device in response to said test input data stream, each of said test output data streams respectively corresponding to one of said data channels.

6. The method of claim 5 , wherein said first format is OC-768 format, said second format is 40G format and said test output data streams are OC-192 data streams.

7. The method of claim 1 , wherein, in said first format, blocks of data of a first size and respectively corresponding to said data channels are timewise interleaved with one another, and wherein, in said second format, blocks of data of a second size and respectively corresponding to said data channels are timewise interleaved with one another, said blocks of said first size differing in size from said blocks of said second size.

8. The method of claim 7 , wherein said blocks of said first size are larger than said blocks of said second size.

9. The method of claim 8 , wherein said blocks of said first size are 64 byte blocks and said blocks of said second size are 2 byte blocks.

10. The method of claim 1 , wherein the data communication device is an interface converter for converting between first and second SONET/SDH interfaces.

11. The method of claim 10 , wherein one of said first and second interfaces is an SFI-5 interface, and wherein the input data stream on which the data communication device normally operates is an output of the SFI-5 interface.

12. An apparatus for testing a data communication device that normally operates on an input data stream including a plurality of data channels timewise interleaved according to a first format, comprising:

an input for receiving test input data corresponding to each of said data channels;

a test data generator coupled to said input for generating in response to said test input data a test input data stream wherein said data channels are timewise interleaved according to a second format that differs from said first format, said test data generator having an output coupled to said data communication device for applying said test input data stream to said data communication device;

said data communication device for producing a test output data stream in response to said test input data stream, said data communication device having an output for providing said test output data stream; and

a verifier coupled to said output of said data communication device for using said test output data stream to verify operation of said data communication device.

13. The apparatus of claim 12 , wherein said first format is OC-768 format.

14. The apparatus of claim 12 , wherein said second format is 40G format.

15. The apparatus of claim 14 , wherein said first format is OC-768 format.

16. The apparatus of claim 12 , wherein said data communication device is responsive to said test input data stream for producing in parallel a plurality of said test output data streams, each of said test output data streams respectively corresponding to one of said data channels.

17. The apparatus of claim 16 , wherein said first format is OC-768 format, said second format is 40G format and said test output data streams are OC-192 data streams.

18. The apparatus of claim 12 , wherein, in said first format, blocks of data of a first size and respectively corresponding to said data channels are timewise interleaved with one another, and wherein, in said second format, blocks of data of a second size and respectively corresponding to said data channels are timewise interleaved with one another, said blocks of said first size differing in size from said blocks of said second size.

19. The apparatus of claim 18 , wherein said blocks of said first size are larger than said blocks of said second size.

20. The apparatus of claim 19 , wherein said blocks of said first size are 64 byte blocks and said blocks of said second size are 2 byte blocks.

21. The apparatus of claim 12 , wherein the data communication device is an interface converter for converting between first and second SONET/SDH interfaces.

22. The apparatus of claim 21 , wherein one of said first and second interfaces is an SFI-5 interface, and wherein the input data stream on which the data communication device normally operates is an output of the SFI-5 interface.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2015
From: STIFEL FINANCIAL CORP.
To: EXAR CORPORATION; CADEKA MICROCIRCUITS, LLC
Reel/Frame 035168/0384 →
SECURITY INTEREST Recorded May 29, 2014
From: EXAR CORPORATION; CADEKA MICROCIRCUITS, LLC
To: STIFEL FINANCIAL CORP.
Reel/Frame 033062/0123 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 6, 2005
From: INFINEON TECHNOLOGIES AG
To: EXAR CORPORATION
Reel/Frame 015979/0697 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2004
From: INFINEON TECHNOLOGIES NORTH AMERICA CORP.
To: INFINEON TECHNOLOGIES AG
Reel/Frame 014716/0264 →
MERGER Recorded Mar 4, 2004
From: INFINEON TECHNOLOGIES CATAMARAN, INC.
To: INFINEON TECHNOLOGIES NORTH AMERICA CORP.
Reel/Frame 014398/0732 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 21, 2003
From: GOYAL, SAMEER; PARVERESHI, JEHANGIR
To: INFINEON TECHNOLOGIES CATAMARAN, INC.
Reel/Frame 013816/0887 →