IP Library Granted Patent US 7,071,504
Granted Patent B2
US 7,071,504 · App. 10/375,788 · Granted Jul 4, 2006

Thin film transistor device and method of manufacturing the same

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Quick Facts
Patent No.
US 7,071,504
App. No.
10/375,788
Granted
Jul 4, 2006
Kind
B2
Abstract

A semiconductor film into which p-type impurities have been introduced is formed on a substrate. Subsequently, a resist film is formed on the semiconductor film, and dry etching is performed to the semiconductor film using the resist film as a mask. Due to the dry etching, the edge portion of the semiconductor film protrudes from the resist film. Next, the p-type impurities are introduced into the edge portion of the semiconductor film using the resist film as a mask. The volume density of the p-type impurities in a channel edge portion of the semiconductor film is two to five times the volume density of the p-type impurities in a channel center section. Subsequently, the resist film is removed to form a gate insulating film and a gate electrode.

Claims (20)

1. A thin film transistor device, comprising:

a substrate; and

a thin film transistor that has a semiconductor film formed above said substrate and a gate electrode intersecting said semiconductor film, said semiconductor film having a channel region overlapping said gate electrode and p-type impurities introduced into said channel region for controlling the threshold value, and a pair of high-concentration impurity regions, which are a source/drain, sandwiching said channel region,

wherein an edge portion of said semiconductor film in a region that said gate electrode overlaps is taper-shaped, and

wherein, in said channel region, the volume density of said p-type impurities in the taper-shaped section of said semiconductor film is twice to five times the volume density of said p-type impurities in a rest section of said semiconductor film.

2. The thin film transistor device according to claim 1 , wherein

an n-type thin film transistor and a p-type thin film transistor are formed above said substrate, and said p-type impurities have been introduced into channel regions of both said n-type thin film transistor and said p-type thin film transistor.

3. The thin film transistor device according to claim 2 , wherein

the volume density of the p-type impurities in the channel region of said n-type thin film transistor is larger than the volume density of said p-type impurities in the channel region of said p-type thin film transistor.

4. A thin film transistor device, comprising:

a substrate; and

a thin film transistor that has a semiconductor film formed above said substrate and a gate electrode intersecting said semiconductor film, said semiconductor film having a channel region overlapping said gate electrode and p-type impurities introduced into said channel region for controlling the threshold value, and a pair of high-concentration impurity regions, which are a source/drain, sandwiching said channel region,

wherein an edge portion of said semiconductor film in a region that said gate electrode overlaps is taper-shaped, and

wherein, in said channel region, said p-type impurities have been introduced into said semiconductor film such that a peak of distribution appears in the vicinity of a surface of said semiconductor film.

5. A thin film transistor device, comprising:

a substrate; and

a p-type thin film transistor and an n-type thin film transistor that have a semiconductor film formed above said substrate and a gate electrode intersecting said semiconductor film, said semiconductor films of said p-type thin film transistor and said n-type thin film transistor having a channel region overlapping said gate electrode and a pair of high-concentration impurity regions, which are source/drain, sandwiching said channel region,

wherein, in both said p-type thin film transistor and said n-type thin film transistor, p-type impurities for controlling the threshold value have been introduced into said channel region, and the edge portion of said semiconductor film in a region that said gate electrode overlaps is taper-shaped, and

wherein the volume density of said p-type impurities in said channel region of said n-type thin film transistor is higher than the volume density of said p-type impurities in said channel region of said p-type thin film transistor, and

wherein, in said channel region of said n-type thin film transistor, the volume density of said p-type impurities in the taper-shaped section of said semiconductor film is twice or more the volume density of said p-type impurities in a rest section of said semiconductor film.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2005
From: FUJITSU LIMITED
To: SHARP KABUSHIKI KAISHA
Reel/Frame 016345/0210 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 13, 2005
From: FUJITSU DISPLAY TECHNOLOGIES CORPORATION
To: FUJITSU LIMITED
Reel/Frame 016345/0310 →