Packaging system for power supplies
View Patent ↗A packaging system for a high current, low voltage power supply. The power supply uses two bare die field effect transistors whose input and output electrodes are solder attached to low resistance, high current posts in the package. An associated controller chip is mounted to a rigid circuit board, and the circuit board is mechanically attached to the posts. The circuit board thereby gives physical rigidity to the package, but carries no high currents. The use of low resistance, high current posts reduces the heat generated, improving the long term reliability.
1. A package for semiconductor devices comprising:
a plurality of metallic posts attached to a substrate;
at least one semiconductor die having a first and second current handling electrode;
at least one metallic strap which couples the first current handling electrode of the semiconductor die to one of the metallic posts; and
a controller chip on the substrate and electrically coupled to a control electrode of the semiconductor die.
2. A package for semiconductor devices comprising:
a plurality of metallic posts attached to a substrate;
at least one semiconductor die having a first and second current handling electrode; and
at least one metallic strap which couples the first current handling electrode of the semiconductor die to one of the metallic posts, wherein one of the metallic posts carries a supply voltage to the second current handling electrode of the semiconductor die.
3. A package for semiconductor devices comprising:
a plurality of metallic posts attached to a substrate;
at least one semiconductor die having a first and second current handling electrode; and
at least one metallic strap which couples the first current handling electrode of the semiconductor die to one of the metallic posts, wherein one of the metallic posts carries a ground potential to the at least one strap.
4. A package for semiconductor devices comprising:
a plurality of metallic posts attached to a substrate;
at least one semiconductor die having a first and second current handling electrode; and
at least one metallic strap which couples the first current handling electrode of the semiconductor die to one of the metallic posts, wherein one of the metallic posts is coupled to the second current handling electrode of the semiconductor die, and also to a second metallic strap coupled to another semiconductor die.
5. A package for semiconductor devices comprising:
a plurality of metallic posts attached to a substrate;
at least one semiconductor die having a first and second current handling electrode; and
at least one metallic strap which couples the first current handling electrode of the semiconductor die to one of the metallic posts, wherein the metallic posts are about 0.5 mm to about 2.5 mm thick.
6. The package of claim 5 , wherein the metallic posts are leads of a single-in-line package.
7. A package for semiconductor devices comprising:
a plurality of metallic posts attached to a substrate;
at least one semiconductor die having a first and second current handling electrode; and
at least one metallic strap which couples the first current handling electrode of the semiconductor die to one of the metallic posts, wherein two or more of the posts are shorted together.
8. The package of claim 5 , wherein the posts are L-shaped in cross section.
9. A package for semiconductor devices comprising:
a plurality of metallic posts attached to a substrate;
at least one semiconductor die having a first and second current handling electrode; and
at least one metallic strap which couples the first current handling electrode of the semiconductor die to one of the metallic posts, wherein the posts comprise copper, plated with nickel and gold.
10. The package of claim 5 , wherein the semiconductor die comprises an FET.
11. A package for semiconductor devices comprising:
a plurality of metallic posts attached to a substrate;
at least one semiconductor die having a first and second current handling electrode; and
at least one metallic strap which couples the first current handling electrode of the semiconductor die to one of the metallic posts, wherein the straps comprise copper, plated with nickel and gold.
12. A package for semiconductor devices comprising:
a plurality of metallic posts attached to a substrate;
at least one semiconductor die having a first and second current handling electrode; and
at least one metallic strap which couples the first current handling electrode of the semiconductor die to one of the metallic posts, wherein the straps comprise aluminum that is ultrasonically bonded to the first current handling electrode of the semiconductor die.
13. The package of claim 1 , wherein the controller chip, the substrate, and the semiconductor die are enclosed in plastic.
14. A package for semiconductor devices comprising:
a plurality of metallic posts attached to a substrate;
at least one semiconductor die having a first and second current handling electrode; and
at least one metallic strap which couples the first current handling electrode of the semiconductor die to one of the metallic posts, wherein the substrate is a thermally conductive laminated ceramic-filled polymer.
15. A power supply comprising:
a plurality of metallic posts, comprising an input post, a ground post and an output post;
a first semiconductor die whose drain electrode is coupled to the input post, and whose source electrode is coupled to a first metallic strap which is coupled to the output post; and
a second semiconductor die whose drain electrode is coupled to the output post; and whose source electrode is coupled to the ground post by a second metallic strap.
16. The power supply of claim 15 , further comprising:
a printed circuit board which is mechanically attached to the plurality of metallic posts.
17. The power supply of claim 16 , further comprising a controller chip on the printed circuit board, and which outputs a control gate signal which is coupled to a gate electrode of the semiconductor die.
18. The power supply of claim 15 , wherein the input post, ground post and output post are leads of a single-in-line package (SIP).
19. The power supply of claim 15 , wherein the input post, ground post and output post are leads of surface mount technology (SMT) package.
20. The power supply of claim 15 , wherein the first and second straps comprise copper, plated with nickel and gold.
21. The power supply of claim 15 , wherein the posts are about 0.5 mm to about 2.5 mm thick and comprise aluminum or copper.
22. The power supply of claim 15 , wherein the posts comprise copper, plated with nickel and gold.
23. The power supply of claim 15 , further comprising:
an input capacitor coupled between the input post and the ground post.
24. The power supply of claim 15 , further comprising:
an inductor coupled to the output post and a load; and
a capacitor coupled between the inductor and the ground post.
25. The power supply of claim 15 , wherein the posts are L-shaped in cross section.
26. The power supply of claim 15 , wherein the posts have a shape configured to provide a surface mount configuration.
27. The power supply of claim 15 , wherein the posts have a gull-wing shape in cross section.
28. The power supply of claim 15 , wherein at least one of the metallic posts carries a supply voltage to the drain electrode of at least one of the first semiconductor die and the second semiconductor die.
29. The power supply of claim 15 , wherein at least one of the metallic posts carries a ground potential to at least one of the first metallic strap and the second metallic strap.
30. The power supply of claim 15 , wherein the metallic posts are about 0.5 mm to about 2.5 mm thick.