IP Library Granted Patent US 7,100,273
Granted Patent B2
US 7,100,273 · App. 10/378,241 · Granted Sep 5, 2006

Interconnect validation instruments

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Quick Facts
Patent No.
US 7,100,273
App. No.
10/378,241
Granted
Sep 5, 2006
Kind
B2
Abstract

Interconnect validation instruments and methods are provided. In one embodiment, an interconnect validation instrument has a shell with an opening at first end thereof and a second end opposite the first end. The second end has a plurality of holes. Each of the plurality of holes is adapted to receive a respective one of a plurality of pins therein. Each of the plurality of holes is further adapted to align the respective one of the plurality of pins when received therein when the respective one of the plurality of pins is not aligned.

Claims (36)

1. An interconnect validation instrument comprising:

a shell having an opening at a first end thereof and a second end opposite the first end, the second end having a plurality of holes;

wherein each of the plurality of holes is adapted to receive a respective one of a plurality of pins therein;

wherein each of the plurality of holes is further adapted to align the respective one of the plurality of pins when received therein when the respective one of the plurality of pins is not aligned; and

wherein the plurality of pins are fixed to a structure that is separate from the shell.

2. The interconnect validation instrument of claim 1 , wherein each of the plurality of holes passes completely through the shell.

3. The interconnect validation instrument of claim 1 , wherein the opening provides for visually observing alignment of the plurality of pins through the plurality of holes.

4. The interconnect validation instrument of claim 1 , wherein a chamfer is disposed around each of the plurality of holes.

5. The interconnect validation instrument of claim 1 , wherein the shell comprises a first exterior portion protruding from a second exterior portion thereof, the first exterior portion including the second end, the first exterior portion receivable in a shroud containing the plurality of pins.

6. The interconnect validation instrument of claim 5 , wherein the first exterior portion bounds a first chamber within an interior of the shell such that the plurality of holes open into the second chamber, wherein the second exterior portion bounds a second chamber within the interior of the shell, the second chamber communicating the first chamber, the opening providing access to the first chamber and thus the second chanter.

7. The interconnect validation instrument of claim 1 , wherein the shell comprises a step tat is substantially perpendicular to the second end, wherein the step is adapted to abut a shroud disposed round the plurality of pins when the interconnect validation instrument is fully inserted in the shroud, whereby providing a visual indication that the interconnect validation instrument is fully inserted in the shroud.

8. An interconnect validation instrument comprising:

an end-wall at a first end of the interconnect validation instrument;

a plurality of holes passing completely through the end-wall; and

an opening at a second end of the pin tool that is opposite the first end, the opening being substantially parallel to the end-wall, the opening enabling observation of the plurality of holes through an interior of the interconnect validation instrument;

wherein each of the plurality of holes is adapted to receive a respective one of a plurality of pins therein; and

wherein each of the plurality of holes is further adapted to align the respective one of the plurality of pins when received therein when the respective one of the plurality of pins is not aligned.

9. The interconnect validation instrument of claim 8 , wherein the opening provides for visually observing alignment of the plurality of pins through the plurality of holes.

10. The interconnect validation instrument of claim 8 , wherein a chamfer is disposed around each of the plurality of holes.

11. An interconnect validation instrument comprising:

a first chamber bounded by a first wall of the interconnect validation instrument and having an opening substantially perpendicular to the first wall, wherein the opening is located at a first end of the interconnect validation instrument; and

a second chamber communicating with the first chamber, the second chamber bounded by a second wall of the interconnect validation instrument and a third wall of the interconnect validation instrument, the third wall substantially parallel to the opening and substantially perpendicular to the second wall, the third wall forming a second end of the interconnect validation instrument that is opposite the first end, the third wall having a plurality of holes passing completely therethrough;

wherein each of the plurality of boles is adapted to receive a respective one of a plurality of pins therein; and

wherein each of the plurality of holes is further adapted to align the respective one of the plurality of pins when received therein when the respective one of the plurality of pins is not aligned.

12. The interconnect validation instrument of claim 11 , wherein the opening provides for visually observing alignment of the plurality of pins through the plurality of holes via the first and second chambers.

13. The interconnect validation instrument of claim 11 , wherein a chamfer is disposed around each of the plurality of holes.

14. The interconnect validation instrument of claim 11 , wherein a step is connected between the first and second walls and is substantially perpendicular to the first and second walls and substantially parallel to the third wall.

15. The interconnect validation instrument of claim 14 , wherein the step is adapted to abut a shroud disposed around the plurality of pins when the interconnect validation instrument is fully inserted in the shroud, whereby providing a visual indication that the interconnect validation instrument is fully inserted in the shroud.

16. An interconnect validation instrument, comprising:

means for determining whether any misaligned pins of a plurality of pins can be aligned by the interconnect validation instrument;

means for receiving the plurality of pins; and

means for directing the misaligned pins that can be aligned by the interconnect validation instrument into the pin receiving means, wherein the pin receiving means aligns the misaligned pins;

wherein the plurality of pins are fixed to a structure that is separate from the interconnect validation instrument.

17. The interconnect validation instrument of claim 16 , wherein the means for determining whether any misaligned pins of a plurality of pins can be aligned by the interconnect validation instrument comprises a means for observing the plurality of pins through the pin receiving means.

18. The interconnect validation instrument of claim 16 , wherein the means for determining whether any misaligned pins of a plurality of pins can be aligned by the interconnect validation instrument comprises a means for determining whether the interconnect validation instrument can be fully inserted into a shroud containing the plurality of pins.

19. The interconnect validation instrument of claim 16 , wherein the means for directing the misaligned pins comprises means for deflecting the misaligned pins that can be aligned by the interconnect validation instrument into the pin receiving means.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 12, 2022
From: OT PATENT ESCROW, LLC
To: VALTRUS INNOVATIONS LIMITED
Reel/Frame 060005/0600 →
PATENT ASSIGNMENT, SECURITY INTEREST, AND LIEN AGREEMENT Recorded Jan 26, 2021
From: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP; HEWLETT PACKARD ENTERPRISE COMPANY
To: OT PATENT ESCROW, LLC
Reel/Frame 055269/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2015
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 037079/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 12, 2003
From: YOUNGMAN, WILLIAM DALE; TAM, KIN SHING
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 014165/0897 →