Extreme pipeline and optimized reordering technology
View Patent ↗The present invention relates to a binary translator for directly translating binary instructions written for a legacy processor to executable binary instructions for a native processor. In accordance with an important aspect of the invention the binary translator is configured as a reconfigurable translator, which enables the binary translator to be used with different legacy processors and/or operating systems and native processors. The binary translators also optimize to take advantage of more efficient native processor instructions and allows portions of the legacy binary code to be disabled and/or new native instructions to be added to the application program without modification of the legacy binary code.
1. A binary translator comprising:
a loader subsystem for reading and loading legacy binary instructions into a file; and
a legacy instruction processor subsystem for reading said legacy binary instructions and grouping the legacy instructions into groups that end in flow control instructions defining legacy procedures;
a translator subsystem for receiving legacy procedures by translating said legacy binary instructions that form part of said legacy procedures by mapping said legacy instructions to legacy instruction handlers during a first pass that allows multiple instructions in a legacy procedure to be translated into native instructions in parallel and translating said flow control instructions in a second pass thereby creating a translated legacy code stream and
a thunk manager for adding new native binary instructions to said translated legacy code stream.
2. The system as recited in claim 1 , wherein said translator subsystem includes a legacy instruction processor subsystem, an instruction processor subsystem and a native instruction processor subsystem.
3. The binary translator as recited in claim 2 , wherein said legacy instruction processor subsystem is a modular subsystem and is reconfigurable to provide compatibility with different legacy processors.
4. The binary translator as recited in claim 2 , wherein said legacy instruction processor subsystem is configured to disable selected legacy instructions.
5. The binary translator as recited in claim 4 , wherein said native instruction processor subsystem is configured to replace disabled legacy instructions with native instructions.
6. The binary translator as recited in claim 2 , wherein said native instruction processor subsystem is configured to be independent of the legacy processor.
7. The binary translator as recited in claim 6 , wherein said native instruction processor subsystem is configured to enable legacy binary instructions to be executed on different native processors.
8. A binary translator comprising:
a loader subsystem for reading and loading legacy binary instructions into a file;
a legacy instruction processor subsystem for reading said legacy binary instructions and grouping the legacy instructions into groups that end in flow control instructions defining legacy procedures;
a translator subsystem for receiving legacy procedures by translating said legacy binary instructions that form part of said legacy procedures by mapping said legacy instructions to legacy instruction handlers during a first pass that allows multiple instructions in a legacy procedure to be translated into native instructions in parallel and translating said flow control instructions in a second pass thereby creating a translated legacy code stream and
a thunk manager for locating thunk objects inserted into said translated legacy code stream and transferring control to a thunk object handler by way of a vector processing said thunk object and vectoring back to said translated legacy code stream in order to add new native code to said translated legacy code stream that adds new features not included with said legacy code without modifying said legacy binary.