IP Library Granted Patent US 6,999,104
Granted Patent B2
US 6,999,104 · App. 10/392,180 · Granted Feb 14, 2006

Image processing device for layered graphics

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Quick Facts
Patent No.
US 6,999,104
App. No.
10/392,180
Granted
Feb 14, 2006
Kind
B2
Abstract

A graphics processing device and a semiconductor chip therefor, which offer a simple and easy way to change the order of layers in a combined picture. A reading circuit reads a plurality of source images out of a graphics memory. A combiner circuit combines given source images in a specific order. A combination order controller, disposed between the reading unit and combiner circuit, determines in what order the source images should be combined by the combiner circuit.

Claims (33)

1. An image processing device which produces a picture by combining layered images stored in a memory, comprising:

a reading circuit which reads out a plurality of source images from the memory;

a plurality of layer selectors selecting a specified source image from among the plurality of source images read out of the memory;

a cascaded series of image combiners to combine the source images supplied from the corresponding layer selectors; and

a plurality of selection registers specifying which source image each corresponding layer selector should select, thereby determining in what order the source images are to be combined by said image combiners.

2. The image processing device according to claim 1 , wherein:

said combiner circuit comprises a background color register; and

one of said image combiners combines the given source image with a background image whose color is defined in said background color register.

3. The image processing device according to claim 1 , wherein each of said image combiners regards pixel of the given source image as transparent when the pixels have a predetermined color, and thus selects corresponding pixels of image data given at a cascade input therof.

4. The image processing device according to claim 1 , wherein each of said image combiners calculates a weighted sum of two images given thereto.

5. A semiconductor device which produces a picture by combining layered images stored in a memory, comprising:

a reading circuit which reads out a plurality of source images from the memory;

a plurality of layer selectors selecting a specified source image from among the plurality of source images read out of the memory;

a cascaded series of image combiners to combine the source images supplied from the corresponding layer selectors; and

a plurality of selections registers specifying which source image each corresponding layer selector should select, thereby determing in what order the source images are to be combined by said image combiners.

6. The semiconductor device according to claim 5 , wherein:

said combiner circuit comprises a background color register; and

one of said image combiners combines the given source image with a background image whose color is defined in said background color register.

7. The semiconductor device according to claim 5 , wherein each of said image combiners regards pixels of the given source image as transparent when the pixels have a predetermined color, and thus selects corresponding pixels of image data given at a cascade input thereof.

8. The image processing device according to claim 1 , further comprising:

a plurality of transparent color registers storing a transparent color code defined for each corresponding source image; and

a plurality of transparent color detectors which produce transparency signals indicating transparent part of each corresponding source image, by comparing pixels of said each source image with the transparent color code stored in the corresponding transparent color register;

wherein each of said layer selectors selects one of the transparency signals, together with one of the source images, as specified by said selection registers.

9. The semiconductor device according to claim 5 , further comprising:

a plurality of transparent color registers storing a transparent color code defined for each corresponding source image; and

a plurality of transparent color detectors which produce transparency signals indicating transparent part of each corresponding source image, by comparing pixels of said each source image with the transparent color code stored in the corresponding transparent color register;

wherein each of said layer selectors selects one of the transparency signals, together with one of the source images, as specified by said selection registers.

10. The image processing device according to claim 1 , further comprising a plurality of coefficient registers storing a blending coefficient defined for each corresponding source image, wherein:

each of said layer selectors selects one of the blending coefficients, together with one of the source images, as specified by said section registers, and

each of said image combiners calculates a weighted sum of two images given thereto, according to the blending coefficient selected by the corresponding layer selector.

11. The semiconductor device according to claim 5 , further comprising a plurality of coefficient registers storing a blending coefficient defined for each corresponding source image, wherein:

each of said layer selectors selects one of the blending coefficients, together with one of the source images, as specified by said section registers, and

each of said image combiners calculates a weighted sum of two images given thereto, according to the blending coefficient selected by the corresponding layer selector.

Assignments (3)
MERGER Recorded Jul 22, 2011
From: INTELLECTUAL VENTURES HOLDING 45 LLC
To: INTELLECTUAL VENTURES I LLC
Reel/Frame 026637/0317 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2008
From: FUJITSU LIMITED
To: INTELLECTUAL VENTURES HOLDING 45 LLC
Reel/Frame 020704/0550 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 20, 2003
From: KOMAGATA, YOSHINOBU
To: FUJITSU LIMITED
Reel/Frame 013895/0211 →