Extremely high-speed switchmode DC-DC converters
View Patent ↗Switchmode DC—DC power converters using one or more non-Silicon-based switching transistors and a Silicon-based (e.g. CMOS) controller are disclosed. The non-Silicon-based switching transistors may comprise, but are not necessarily limited to, III-V compound semiconductor devices such as gallium arsenide (GaAs) metal-semiconductor field effect transistors (MESFETS) or heterostructure FETs such as high electron mobility transistors (HEMTs). According to an embodiment of the invention, the low figure of merit (FoM), τ FET , of the non-Silicon-based switching transistors allows the converters of the present invention to be employed in envelope tracking amplifier circuits of wireless devices designed for high-bandwidth technologies such as, for example, EDGE and UMTS, thereby improving the efficiency and battery saving capabilities of the wireless devices.
1. A switchmode DC—DC converter, comprising:
a first non-Silicon-based switching transistor having a drain configured to connect to a DC input voltage, a source and a gate;
a Silicon-based controller having an output coupled to the gate of the first non-Silicon-based switching transistor; and
an inductor having a first end coupled to the source of the first non-Silicon-based switching transistor and a second end embodying an output of the converter.
2. The switchmode DC—DC converter of claim 1 wherein the first non-Silicon-based switching transistor comprises a GaAs MESFET.
3. The switchmode DC—DC converter of claim 1 wherein the first non-Silicon-based switching transistor comprises a heterostructure field effect transistor.
4. The switchmode DC—DC converter of claim 1 wherein the first non-Silicon-based switching transistor comprises a heterojunction bipolar transistor (HBT).
5. The switchmode DC—DC converter of claim 1 , further comprising a second non-Silicon-based switching transistor having a gate coupled to a second and complementary output of said Silicon-based controller, a drain coupled to the source of said first non-Silicon-based switching transistor, and a source coupled to a reference voltage.
6. The switchmode DC—DC converter of claim 5 wherein the second non-Silicon-based switching transistor comprises a GaAs MESFET.
7. The switchmode DC—DC converter of claim 5 wherein the second non-Silicon-based switching transistor comprises a heterostructure field effect transistor.
8. The switchmode DC—DC converter of claim 1 wherein the Silicon-based controller is manufactured from CMOS technology.
9. switchmode DC—DC converter of claim 8 wherein the CMOS controller is or comprises part of an integrated circuit, and the first non-Silicon-based switching transistor is a discrete device.
10. The switchmode DC—DC converter of claim 1 wherein the first non-Silicon-based switching transistor is configured to chop the DC input voltage at a rate greater than about 5 MHz.
11. The switchmode DC—DC converter of claim 1 , further comprising a second non-Silicon-based switching transistor that is configured to chop the DC input voltage at a rate greater than about 5 MHz.
12. The switchmode DC—DC converter of claim 11 wherein the second non-Silicon-based transistor has a figure of merit (FoM), τ FET , of less than about 5 picoseconds.
13. The switchmode DC—DC converter of claim 1 wherein the first non-Silicon-based switching transistor has a figure of merit (FoM), τ FET , of less than about 5 picosecond.
14. An envelope tracking amplifier circuit for a wireless device radio frequency (RF) transmitter, comprising:
an envelope detector operable to detect and track an envelope variation of an RF input signal;
a power amplifier configured to receive the RF input signal and generate a envelope tracking control signal; and
a switchmode DC—DC converter configured to respond to the envelope tracking control signal and provide a dynamically variable voltage for powering the power amplifier, said switchmode DC—DC converter comprising:
a first non-Silicon-based switching transistor having a drain configured to connect to a DC input voltage, a source and a gate,
a Silicon-based controller having an output coupled to the gate of the first non-Silicon-based switching transistor, and
an inductor having a first end coupled to the source of the first non-Silicon-based switching transistor and a second end embodying an output of the converter.
15. The envelope tracking amplifier circuit of claim 14 wherein the first non-Silicon-based switching transistor comprises a heterostructure field effect transistor.
16. The envelope tracking amplifier circuit of claim 14 wherein the first non-Silicon-based switching transistor comprises a heterojunction bipolar transistor (HBT).
17. The envelope tracking amplifier circuit of claim 14 wherein the switchmode DC—DC converter further comprises a second non-Silicon-based switching transistor having a gate coupled to a second and complementary output of said Silicon-based controller, a drain coupled to the source of said first non-Silicon-based switching transistor, and a source coupled to a reference voltage.
18. The envelope tracking amplifier circuit of claim 17 wherein the second non-Silicon-based switching transistor comprises a GaAs MESFET.
19. The envelope tracking amplifier circuit of claim 17 wherein the second non-Silicon-based switching transistor comprises a heterostructure field effect transistor.
20. The envelope tracking amplifier circuit of claim 14 wherein the Silicon-based controller is manufactured from CMOS technology.
21. The envelope tracking amplifier of claim 20 wherein the CMOS controller is or comprises part of an integrated circuit, and the first non-Silicon-based switching transistor is a discrete device.
22. The envelope tracking amplifier circuit of claim 14 wherein the first non-Silicon-based switching transistor is configured to chop the DC input voltage at a rate greater than about 5 MHz.
23. The envelope tracking amplifier of claim 14 wherein the switchmode DC—DC converter further comprises a second non-Silicon-based switching transistor that is configured to chop the DC input voltage at a rate greater than about 5 MHz.
24. The envelope tracking amplifier of claim 23 wherein the second non-Silicon-based transistor has a figure of merit (FoM), τ FET , of less than about 5 picoseconds.
25. The envelope tracking amplifier circuit of claim 14 wherein the first non-Silicon-based switching transistor comprises a GaAs MESFET.
26. The envelope tracking amplifier circuit of claim 13 wherein the first non-Silicon-based switching transistor has a figure of merit (FoM), τ FET , of less than about 5 picoseconds.
27. A transmitter circuit, comprising:
a radio frequency (RF) power generator configured to receive an angle modulated RF signal at a first input port; and
a switchmode DC—DC converter operable to provide an envelope control signal to a second input port of the RF power generator, said switchmode DC—DC converter comprising:
a first non-Silicon-based switching transistor having a drain configured to connect to a DC input voltage, a source and a gate,
a Silicon-based controller having an output coupled to the gate of the first non-Silicon-based switching transistor, and
an inductor having a first end coupled to the source of the first non-Silicon-based switching transistor and a second end embodying an output of the converter.
28. The transmitter circuit of claim 27 wherein the first non-Silicon-based switching transistor comprises a GaAs MESFET.
29. The transmitter circuit of claim 27 wherein the first non-Silicon-based switching transistor comprises a heterostructure field effect transistor.
30. The transmitter circuit of claim 27 wherein the first non-Silicon-based switching transistor comprises a heterojunction bipolar transistor (HBT).
31. The transmitter circuit of claim 27 wherein the switchmode DC—DC converter further comprises a second non-Silicon-based switching transistor having a gate coupled to a second and complementary output of said Silicon-based controller, a drain coupled to the source of said first non-Silicon-based switching transistor, and a source coupled to a reference voltage.
32. The transmitter circuit of claim 31 wherein the second non-Silicon-based switching transistor comprises a GaAs MESFET.
33. The transmitter circuit of claim 31 wherein the second non-Silicon-based switching transistor comprises a heterostructure field effect transistor.
34. The transmitter circuit of claim 27 wherein the Silicon-based controller is manufactured from CMOS technology.
35. The transmitter circuit of claim 34 wherein the CMOS controller is or comprises part of an integrated circuit, and the first non-Silicon-based switching transistor is a discrete device.
36. The transmitter circuit of claim 27 wherein the first non-Silicon-based switching transistor is configured to shop the DC input voltage at a rate greater than about 5 MHz.
37. The transmitter circuit of claim 27 wherein the switchmode DC—DC converter further comprises a second non-Silicon-based switching transistor that is configured to chop the DC input voltage at a rate greater than about 5 MHz.
38. The transmitter circuit of claim 37 wherein the second non-Silicon-based transistor has a figure of merit (FoM), τ FET , of less than about 5 picoseconds.
39. The transmitter circuit of claim 27 wherein the first non-Silicon-based switching transistor has a figure of merit (FoM), τ FET , of less than about 5 picoseconds.
40. The transmitter circuit of claim 27 , further comprising a polar modulator operable to convert modulation input symbols into a phase modulation (PM) component and an amplitude modulation (AM) component, said DC—DC converter having an input port configured to receive the AM component.
41. The transmitter circuit of claim 40 , further comprising a phase modulator configured to receive the PM component and provide the angle modulate RF signal.
42. A video amplifier circuit, comprising
a switchmode DC—DC converter operable to respond to an input video signal, said switchmode DC—DC converter comprising:
a first non-Silicon-based switching transistor having a drain configured to connect to a DC input voltage, a source and a gate,
a Silicon-based controller having an output coupled to the gate of the first non-Silicon-based switching transistor, and
an inductor having a first end coupled to the source of the first non-Silicon-based switching transistor and a second end embodying an output of the converter and configured to provide a DC output voltage.
43. The video amplifier circuit of claim 42 wherein the first non-Silicon-based switching transistor comprises a GaAs MESFET.
44. The video amplifier circuit of claim 42 wherein the first non-Silicon-based switching transistor comprises a heterostructure field effect transistor.
45. The video amplifier circuit of claim 42 wherein the first non-Silicon-based switching transistor comprises a heterojunction bipolar transistor (HBT).
46. The video amplifier circuit of claim 42 wherein the switchmode DC—DC converter further comprises a second non-Silicon-based switching transistor having a gate coupled to a second and complementary output of said Silicon-based controller, a drain coupled to the source of said first non-Silicon-based switching transistor, and a source coupled to a reference voltage.
47. The video amplifier circuit of claim 46 wherein the second non-Silicon-based switching transistor comprises a GaAs MESFET.
48. The video amplifier circuit of claim 46 wherein the second non-Silicon-based switching transistor comprises a heterostructure field effect transistor.
49. The video amplifier circuit of claim 42 wherein the Silicon-based controller is manufactured from CMOS technology.
50. The video amplifier circuit of claim 49 wherein the CMOS controller is or comprises part of an integrated circuit, and the first non-Silicon-based switching transistor is a discrete device.
51. The video amplifier circuit of claim 42 wherein the first non-Silicon-based switching transistor is configured to chop the DC input voltage at a rate greater than about 5 MHz.
52. The video amplifier circuit of claim 42 wherein the switchmode DC—DC converter further comprises a second non-Silicon-based switching transistor that is configured to chop the DC input voltage at a rate greater than about 5 MHz.
53. The video amplifier circuit of claim 52 wherein the second non-Silicon-based transistor has a figure of merit (FoM), τ FET , of less than about 5 picoseconds.
54. The video amplifier circuit of claim 42 wherein the first non-Silicon-based switching transistor has a figure of merit (FoM), τFET, of less than about 5 picoseconds.
55. The video amplifier circuit of claim 42 wherein the input video signal includes a DC offset signal.
56. The video amplifier circuit of claim 42 , further comprising a pass transistor having a first terminal coupled to an output of the DC—DC converter, a second terminal embodying an output of the video amplifier circuit and a control terminal.
57. The video amplifier circuit of claim 56 , further comprising an operational amplifier having a noninverting input configured to receive the input video signal, an inverting input coupled the second terminal of the pass transistor, and an output coupled to the output of the video amplifier circuit.