Liquid crystal display for preventing galvanic phenomenon

1. A method for manufacturing a thin film transistor, wherein the thin film transistor has a source/drain electrode on an insulating substrate, comprising the steps of:

forming a conductive layer to cover the source/drain electrode;

heat treating the conductive layer in an oxygen atmosphere to form a metal oxide layer; and

forming a metal connector line on the metal oxide layer such that the metal connector line and the source/drain electrode are connected via the metal oxide layer, and the metal oxide layer is conductive over the source/drain electrode and the metal oxide layer is insulative over a gate insulating layer that exposes the source/drain electrode, wherein the metal oxide layer does not require a separate etching process.

2. The method according to claim 1 , wherein the heat treating step is performed at a temperature less than about 300° C.

3. The method according to claim 1 , wherein the heat treating step is performed while exposing the thin film transistor to air.

4. The method according to claim 1 , wherein the step of forming the metal connector line further includes the step of a simultaneous etching process using a photo mask to pattern the metal oxide layer while forming the metal connector line.

5. The method according to claim 1 , wherein the metal oxide layer is transparent.

6. A method for manufacturing a liquid crystal display comprising the steps of:

forming a data line on an insulating substrate, the data line being provided with a source electrode;

forming an interlevel insulating layer on the insulating substrate so as to cover the data line;

forming an active layer on the interlevel insulating layer;

depositing a gate insulating layer on the active layer;

forming a gate electrode over the gate insulating layer;

selectively doping the active layer with impurities to form a source/drain region;

forming a protective layer so to cover the interlevel layer, the active layer and the gate insulating layer;

etching the interlevel insulating layer, the gate insulating layer and the protective layer so as to expose the source electrode and the source/drain region;

forming a conductive layer on the interlevel layer, the active layer, the gate insulating layer, the protective layer, the source electrode and the source/drain region;

heat treating the conductive layer in an oxygen atmosphere to form a metal oxide layer; and

forming a metal connector line on the metal oxide layer.

7. The method as claimed in claim 6 , wherein the heat treating step is performed at a temperature of less than about 300° C.

8. The method as claimed in claim 6 , wherein the step of forming the metal connector line further includes the step of a simultaneous etching process using a photo mask to pattern the metal oxide layer while forming the metal connector line.

9. A method of forming a liquid crystal display apparatus, comprising the steps of:

providing a substrate;

forming a source/drain electrode and a connector line over the substrate; and

forming a metal oxide layer between the source/drain electrode and the connector line, and the metal oxide layer is conductive over the source/drain electrode and the metal oxide layer is insulative over an insulating layer, wherein the metal oxide layer does not require a separate etching process.

10. The method according to claim 9 , wherein the metal oxide layer is formed to prevent the source/drain electrode from contacting the connector line.

11. The method according to claim 9 , wherein the metal oxide layer is formed such that the connector line and the source/drain electrode are connected via the metal oxide layer.

12. The method according to claim 9 , wherein the step of forming the metal oxide layer includes the steps of forming a conductive layer to cover the source/drain electrode and heat treating the conductive layer in an oxygen atmosphere to form a metal oxide layer.

13. The method according to claim 12 , wherein the heat treating step is performed at a temperature less than about 300° C.

14. The method according to claim 12 , wherein the heat treating step is performed while exposing the thin film transistor to air.

15. The method according to claim 9 , wherein the connector line is formed such that simultaneous etching using a photo mask is performed to pattern the metal oxide layer while forming the connector line.

16. The method according to claim 9 , wherein the metal oxide layer is transparent.