Method for fabrication of MOSFET with buried gate
View Patent ↗An insulation is formed on a substrate of a material having a first conductivity type. A gate material is formed on the insulation. A portion of the gate material is removed thereby creating forming mesa type gate structures from remaining positions of the gate material. The mesas are then insulated. A channel forming layer, of a material having a second conductivity type, is formed between the produced mesas. Finally, a source of a material having the first conductivity type is formed on the channel forming layer.
1. A method of manufacturing a semiconductive device, said method comprising:
providing a substrate having a first conductivity type;
forming a first insulator layer on said substrate;
forming gate material on said first insulator;
providing a first mask;
removing portions of said gate material dictated by said first mask, thereby creating mesas out of said gate material from remaining portions of said gate material;
depositing a second insulator layer around said gate material;
forming a channel forming layer of a material having a second conductivity type on said substrate and in between said mesas; and
depositing a source layer having said first conductivity type on said channel forming layer.
2. The method as claimed in claim 1 , further comprising:
depositing a third insulator layer on a top portion of said semiconductive device;
providing a second mask; and
removing portions of said third insulator dictated by said second mask thereby creating an opening in said third insulator and providing access to said channel layer.
3. The method as claimed in claim 2 , further comprising:
placing an implant of said second conductivity type through said opening and into said channel layer; and
diffusing said implant.
4. The method as claimed in claim 3 , further comprising:
depositing a contact layer on top of said semiconductive device.
5. The method as claimed in claim 4 , further comprising:
depositing a collector layer beneath said substrate.
6. The method as claimed in claim 1 , further comprising:
depositing a collector layer below said substrate.
7. The method as claimed in claim 1 , further comprising depositing a third insulator on said gate material before performing said providing a first mask.