IP Library Granted Patent US 7,439,449
Granted Patent B1
US 7,439,449 · App. 10/409,837 · Granted Oct 21, 2008

Flexible circuit for establishing electrical connectivity with optical subassembly

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Quick Facts
Patent No.
US 7,439,449
App. No.
10/409,837
Granted
Oct 21, 2008
Kind
B1
Abstract

Flexible printed circuit boards interconnect to adjacent electronic devices through one or more of high speed data, low speed data, high current, and ground lines and pads. The design of the high speed data pads and traces and adjacent ground pads and traces maintains a desired impedance in the flexible circuit and at the transition from the flexible circuit to a printed circuit board, a ceramic header, or other device to ensure high speed operation. The pads are preferably arranged in a two dimensional geometry such that a connecting area of the flexible circuit is narrower than it would preferably be if the pads were arranged linearly. The two dimensional array also allows the use of the high current thermoelectric cooler pads, which require large surface areas that may otherwise not fit in a conventional linear array.

Claims (15)

1. A flexible circuit comprising:

a flexible substrate having first and second opposing surfaces;

a first connecting area comprising a first data pad on the first surface;

a second connecting area comprising a second data pad on the first surface;

a first conductive trace on the first surface of the flexible substrate, the first conductive trace conductively connecting the first data pad to the second data pad; and

a ground trace on the second surface of the flexible substrate and having at least one contact pad on at least one of the first connecting area and the second connecting area, the ground trace having a portion that is adjacent to but not in contact with at least one of the first data pad and the second data pad, wherein the ground trace connects through the flexible substrate to ground pads on the first surface, the ground pads positioned on both sides of the first conductive trace such that the ground trace and the ground pads wrap around the first conductive trace, wherein the ground trace is arranged to maintain an impedance by producing a controlled amount of capacitance that compensates for inductance associated with coming up from the ground trace or through the flexible substrate.

2. The flexible circuit as defined in claim 1 , wherein the portion of the ground trace that is adjacent to but not in contact with at least one of the first data pad and the second data pad forms a box shape having an opening therein, the ground trace substantially surrounding the adjacent data pad.

3. The flexible circuit as defined in claim 1 , wherein the portion of the ground trace that is adjacent to but not in contact with at least one of the first data pad and the second data pad forms a claw shape that surrounds portions of, but not all of, the adjacent data pad.

4. The flexible circuit as defined in claim 1 , wherein the portion of the ground trace that is adjacent to but not in contact with at least one of the first data pad and the second data pad wraps around a portion of the adjacent data pad.

5. The flexible circuit as defined in claim 1 , further comprising:

a first thermoelectric cooler pad at the first connecting area;

a second thermoelectric cooler pad at the second connecting area; and

a third conductive trace conductively connecting the first thermoelectric cooler pad to the second thermoelectric cooler pad, at least one of the first thermoelectric cooler pad and the second thermoelectric cooler pad having a larger surface area than the surface area of the adjacent data pad.

6. The flexible circuit as defined in claim 1 , wherein the flexible circuit is configured for conductively connecting a transmitter optical subassembly to a printed circuit board.

7. The flexible circuit as defined in claim 1 , wherein the substrate comprises multiple layers.

Assignments (4)
PATENT RELEASE AND REASSIGNMENT Recorded Jul 5, 2022
From: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
To: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
Reel/Frame 060574/0001 →
SECURITY INTEREST Recorded Jul 1, 2022
From: II-VI INCORPORATED; II-VI DELAWARE, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; PHOTOP TECHNOLOGIES, INC.; COHERENT, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 060562/0254 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: FINISAR CORPORATION
To: II-VI DELAWARE, INC.
Reel/Frame 052286/0001 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Sep 25, 2019
From: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 050484/0204 →