IP Library Granted Patent US 6,903,390
Granted Patent B2
US 6,903,390 · App. 10/416,144 · Granted Jun 7, 2005

Single metal programmability in a customizable integrated circuit device

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Quick Facts
Patent No.
US 6,903,390
App. No.
10/416,144
Granted
Jun 7, 2005
Kind
B2
Abstract

A customizable integrated circuit including a substrate, a plurality of logic units formed on the substrate and a plurality of metal routing layers formed on the substrate for interconnecting the plurality of logic units. The plurality of metal routing layers includes a first routing layer including a plurality of elongate conductors extending generally in a given direction, a second routing layer including a plurality of transversely extending conductors, each adapted for interconnecting a termination of one of the plurality of elongate conductors to a beginning of another one of the plurality of elongate conductors and at least a third routing layer, including a plurality of local routing conductors, a plurality of customizable connections between pairs of the plurality of elongate conductors via individual ones of the plurality of transversely extending conductors and customizable connections between individual elongate conductors and a plurality of individual local routing conductors.

Claims (48)

1. A customizable integrated circuit comprising:

a substrate;

a plurality of logic units formed on said substrate; and

a plurality of electrically conducting routing layers formed on said substrate for interconnecting said plurality of logic units, said plurality of electrically conducting routing layers including:

a first routing layer including a plurality of elongate conductors extending generally in a given direction;

a second routing layer including a plurality of transversely extending conductors, each adapted for interconnecting a termination of one of said plurality of elongate conductors to a beginning of another one of said plurality of elongate conductors; and

a third routing layer including:

a plurality of customizable connections between individual ones of said plurality of elongate conductors and one of a ground line and a power supply line, whereby elongate conductors may serve as anti-crosstalk shields between adjacent other ones of said plurality of elongate conductors.

2. A customizable integrated circuit comprising:

a substrate;

a plurality of logic units formed on said substrate; and

a plurality of electrically conducting routing layers formed on said substrate for interconnecting said plurality of logic units, said plurality of electrically conducting routine layers including:

a first routing layer including a plurality of elongate conductors extending generally in a given direction;

a second routing layer including a plurality of transversely extending conductors, each adapted for interconnecting a termination of one of said plurality of elongate conductors to a beginning of another one of said plurality of elongate conductors; and

at least a third routing layer including;

a plurality of local routing conductors;

a plurality of customizable connections between pairs of said plurality of elongate conductors by way of individual ones of said plurality of transversely extending conductors;

customizable connections between individual ones of said plurality of elongate conductors and a plurality of individual ones of said local routine conductors; and

a plurality of customizable connections between individual ones of said plurality of elongate conductors and one of a ground line and a power supply line, whereby elongate conductors may serve as anti-crosstalk shields between adjacent other ones of said plurality of elongate conductors.

3. A customizable integrated circuit comprising:

a substrate;

a plurality of logic units formed on said substrate; and

a plurality of electrically conducting routine layers formed on said substrate for interconnecting said plurality of logic units, said plurality of electrically conducting routing layers including:

a first routine layer including a plurality of elongate conductors extending generally in a given direction;

a second routing layer including a plurality of transversely extending conductors, each adapted for interconnecting a termination of one of said plurality of elongate conductors to a beginning of another one of said plurality of elongate conductors; and

at least a third routing layer including:

a plurality of customizable connections between pairs of said plurality of elongate conductors by way of individual ones of said plurality of transversely extending conductors, said plurality of customizable connections being arranged generally in at least one row, and

a plurality of customizable connections between individual ones of said plurality of elongate conductors and one of a ground line and a power supply line, whereby elongate conductors may serve as anti-crosstalk shields between adjacent other ones of said plurality of elongate conductors.

4. A customizable integrated circuit comprising:

a substrate;

a plurality of logic units formed on said substrate; and

a plurality of electrically conducting routine layers formed on said substrate for interconnecting said plurality of logic units, said plurality of electrically conducting routine layers including:

a first routine layer including a plurality of elongate conductors extending generally in a given direction;

a second routing layer including a plurality of transversely extending conductors, each adapted for interconnecting a termination of one of said plurality of elongate conductors to a beginning of another one of said plurality of elongate conductors; and

at least a third routing layer including:

a plurality of local routine conductors;

a plurality of customizable connections between pairs of said plurality of elongate conductors by way of individual ones of said plurality of transversely extending conductors;

customizable connections between individual ones of said plurality of elongate conductors and a plurality of individual ones of said local routing conductors, and

at least a third and a fourth routing layer.

5. A customizable integrated circuit comprising:

a substrate;

a plurality of logic units formed on said substrate; and

a plurality of electrically conducting routing layers formed on said substrate for interconnecting said plurality of logic units, said plurality of electrically conducting routine layers including:

a first routine layer including a plurality of elongate conductors extending generally in a given direction;

a second routing layer including a plurality of transversely extending conductors, each adapted for interconnecting a termination of one of said plurality of elongate conductors to a beginning of another one of said plurality of elongate conductors; and

at least a third routine layer including:

a plurality of customizable connections between pairs of said plurality of elongate conductors by way of individual ones of said plurality of transversely extending conductors, said plurality of customizable connections being arranged generally in at least one row, and

at least a third and a fourth routing layer.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Apr 5, 2017
From: SILICON VALLEY BANK
To: CHIPX, INCORPORATED
Reel/Frame 041855/0702 →
SECURITY INTEREST Recorded Apr 15, 2011
From: CHIPX, INC.
To: SILICON VALLEY BANK
Reel/Frame 026179/0023 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 23, 2004
From: AMRILIO, LIOR; BEN-CHEN, TOMER; YOELI, UZI
To: CHIP EXPRESS (ISRAEL) LTD.
Reel/Frame 014924/0757 →