Sensor method for dual line integrating line scan sensor

1. A method comprising:

applying a transfer clock pulse to a transfer gate electrode of a first clocking structure and a transfer gate electrode of a second clocking structure;

applying a first delay clock pulse to a delay well electrode of the first clocking structure after the transfer clock pulse is applied; and

applying a second delay clock pulse to a delay well electrode of the second clocking structure before the transfer clock pulse is applied.

2. A method comprising a first step followed by a second step, wherein:

the first step includes transferring photo charges in a delay register into a first readout register;

the first step further includes transferring photo charges in a first storage register into the delay register;

the first step further includes transferring photo charges in a second storage register into a second readout register;

the second step includes collecting photo charges in the first storage register;

the second step further includes collecting photo charges in the second storage register;

the second step further includes shifting photo charges in the first readout register toward a first output; and

the second step further includes shifting photo charges in the second readout register toward a second output.

3. The method of claim 2 , further including repeating the first step and then the second step.

4. The method of claim 2 , further comprising:

combining photo charges at the first and second outputs; and

converting the combined photo charges into a signal.

5. The method of claim 2 , further comprising:

converting photo charges at the first output into a first signal;

converting photo charges at the second output into a second signal; and

combining the first and second signals into an output signal.

6. A method comprising:

collecting a first line of photo charges from a first line array of pixels;

delaying the first line of photo charges;

collecting a second line of photo charges from a second line array of pixels;

shifting the delayed first line of photo charges toward a first output while simultaneously shifting the second line of photo charges toward a second output; and

combining the delayed first line of photo charges at the first output with the second line of photo charges at the second output.

7. A method according to claim 6 , wherein the combining a includes combining the photo charges at the first and second outputs to form a single combined charge packet.

8. A method according to claim 6 , further includes repeating the combining each time the second line of photo charges is shifted toward the second output.

9. The method of claim 6 , wherein the first and second line arrays of pixels are co-parallel but not spatially offset in the longitudinal direction.

10. The method of claim 6 , wherein:

the first and second line arrays of pixels are co-parallel;

each pixel in the first line array of pixels has a corresponding pixel in the second line array of pixels defining a pixel pair; and

pairs of corresponding pixels have mirror symmetry across a line co-parallel to a longitudinal direction of the first line array of pixels.