IP Library › Granted Patent US 7,076,634
Granted Patent B2
US 7,076,634 · App. 10/422,214 · Granted Jul 11, 2006

Address translation manager and method for a logically partitioned computer system

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Quick Facts
Patent No.
US 7,076,634
App. No.
10/422,214
Granted
Jul 11, 2006
Kind
B2
Abstract

An address translation manager creates a set of chained tables that may be allocated in non-contiguous physical memory, and that may be dynamically resized as needed. The chained tables comprise one or more tables that each correspond to a logical partition, with each table including a pointer to a table corresponding to a virtual connection in the logical partition. The chained tables are managed by the address translation manager, which uses the system memory manager to dynamically allocate and free memory for a chained table as needed.

Claims (44)

1. An apparatus comprising:

at least one processor;

a memory coupled to the at least one processor;

a plurality of logical partitions defined on the apparatus; and

an address translation manager that uses an address translation table to translate an address in one of the plurality of logical partitions to a corresponding physical address in the memory, the address translation table comprising a first chained table corresponding to one of the plurality of logical partitions, the first table containing a pointer to a second table corresponding to a virtual connection in the one logical partition.

2. The apparatus of claim 1 wherein the second table comprises a chained table.

3. The apparatus of claim 1 wherein the first and second tables are located in non-contiguous portions of the memory.

4. The apparatus of claim 1 wherein the address translation manager creates the first and second tables in the memory.

5. The apparatus of claim 1 wherein the address translation manager dynamically changes the size of the address translation table.

6. The apparatus of claim 1 wherein the address translation table comprises:

a partition connection chained table comprising a first set of tables, wherein each table in the first set of tables includes at least one pointer to a corresponding connection translation chained table, each connection translation chained table comprising a second set of tables, wherein each table in the second set of tables comprises at least one translation control entity for translating an address in one of the plurality of logical partitions to a corresponding physical address in the memory.

7. An apparatus comprising:

at least one processor;

a memory coupled to the at least one processor;

a plurality of logical partitions defined on the apparatus;

an address translation manager that uses an address translation table to translate an address in one of the plurality of logical partitions to a corresponding physical address in the memory, the address translation table comprising a partition connection chained table comprising a first set of tables, wherein each table in the first set of tables includes at least one pointer to a corresponding connection translation chained table, each connection translation chained table comprising a second set of tables, wherein each table in the second set of tables comprises at least one translation control entity for translating an address in one of the plurality of logical partitions to a corresponding physical address in the memory, wherein the address translation manager dynamically changes the size of the address translation table; and

a memory manager that allocates at least one portion of the memory for the address translation table.

8. A computer-implemented method for translating an address in a logical partition to a corresponding physical address in memory, the method comprising the steps of:

constructing an address translation table, the address translation table comprising a first chained table corresponding to the logical partition, the first table containing a pointer to a second table corresponding to a virtual connection in the logical partition;

reading from the first table the pointer to the second table; and

accessing at least one item in the second table to translate the address to the corresponding physical address in memory.

9. The method of claim 8 wherein the at least one item comprises at least one translation control entity.

10. The method of claim 8 wherein the second table comprises a chained table.

11. The method of claim 8 wherein the first and second tables are located in non-contiguous portions of the memory.

12. The method of claim 8 further comprising the step of creating the first and second tables in the memory.

13. The method of claim 8 further comprising the step of dynamically changing the size of the address translation table.

14. The method of claim 8 wherein the address translation table comprises:

a partition connection chained table comprising a first set of tables, wherein each table in the first set of tables includes at least one pointer to a corresponding connection translation chained table, each connection translation chained table comprising a second set of tables, wherein each table in the second set of tables comprises at least one translation control entity for translating an address in one of the plurality of logical partitions to a corresponding physical address in the memory.

15. A computer-implemented method for translating an address in a logical partition to a corresponding physical address in memory, the method comprising the steps of:

constructing an address translation table, the address translation table comprising a partition connection chained table comprising a first set of tables, wherein each table in the first set of tables includes at least one pointer to a corresponding connection translation chained table, each connection translation chained table comprising a second set of tables, wherein each table in the second set of tables comprises at least one translation control entity for translating an address in one of the plurality of logical partitions to a corresponding physical address in the memory;

reading from the partition connection chained table a pointer to the connection translation chained table; and

accessing at least one translation control entity in the connection translation chained table to translate the address to the corresponding physical address in memory.

16. A program product comprising:

an address translation manager that uses an address translation table to translate an address in one of a plurality of logical partitions to a corresponding physical address in memory, the address translation table comprising a first chained table corresponding to one of the plurality of logical partitions, the first table containing a pointer to a second table corresponding to a virtual connection in the one logical partition; and

recordable signal bearing media bearing the address translation manager.

17. The program product of claim 16 wherein the second table comprises a chained table.

18. The program product of claim 16 wherein the first and second tables are located in non-contiguous portions of the memory.

19. The program product of claim 16 wherein the address translation manager creates the first and second tables in the memory.

20. The program product of claim 16 wherein the address translation manager dynamically changes the size of the address translation table.

21. The program product of claim 16 wherein the address translation table comprises:

a partition connection chained table comprising a first set of tables, wherein each table in the first set of tables includes at least one pointer to a corresponding connection translation chained table, each connection translation chained table comprising a second set of tables, wherein each table in the second set of tables comprises at least one translation control entity for translating an address in one of the plurality of logical partitions to a corresponding physical address in the memory.

22. A program product comprising:

(A) an address translation manager that uses an address translation table to translate an address in one of a plurality of logical partitions to a corresponding physical address in memory, the address translation table comprising a partition connection chained table comprising a first set of tables, wherein each table in the first set of tables includes at least one pointer to a corresponding connection translation chained table, each connection translation chained table comprising a second set of tables, wherein each table in the second set of tables comprises at least one translation control entity for translating an address in one of the plurality of logical partitions to a corresponding physical address in the memory, wherein the address translation manager dynamically changes the size of the address translation table; and

(B) recordable signal bearing media bearing the address translation manager.

Assignments (2)
CHANGE OF NAME Recorded Oct 5, 2017
From: GOOGLE INC.
To: GOOGLE LLC
Reel/Frame 044127/0735 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2011
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: GOOGLE INC.
Reel/Frame 027463/0594 →