IP Library Granted Patent US 7,103,734
Granted Patent B1
US 7,103,734 · App. 10/424,454 · Granted Sep 5, 2006

System and method for identifying empty locations in a scrambled memory

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Quick Facts
Patent No.
US 7,103,734
App. No.
10/424,454
Granted
Sep 5, 2006
Kind
B1
Abstract

A system includes a memory operable to store scrambled data at a plurality of memory locations. The system also includes an empty detector operable to determine whether a specified memory location is empty using contents of the specified memory location. The contents of the specified memory location are not descrambled for use by the empty detector in determining whether the specified memory location is empty.

Claims (28)

1. A method, comprising:

identifying a specified memory location in a memory;

determining whether the specified memory location has an address contained in a first address range or in a second address range; and

determining whether the specified memory location is empty based at least partially on contents of the specified memory location and on whether the address of the specified memory location is contained in the first address range or the second address range, wherein determining whether the specified memory location is empty comprises retrieving the contents of the specified memory location from the memory, and wherein the retrieved contents have not been descrambled.

2. The method of claim 1 , wherein determining whether the specified memory location is empty comprises comparing the contents of the specified memory location to an erase state.

3. The method of claim 2 , wherein the erase state comprises a predetermined value.

4. The method of claim 1 , wherein identifying the specified memory location comprises receiving a request to write data to the specified memory address.

5. The method of claim 1 , wherein the first address range is associated with a first memory mapping of the memory and the second address range is associated with a second memory mapping of the memory.

6. A system, comprising:

a memory operable to store scrambled data at a plurality of memory locations; and

an empty detector operable to determine whether a specified memory location is empty using contents of the specified memory location, wherein the contents of the specified memory location are not descrambled for use by the empty detector in determining whether the specified memory location is empty.

7. The system of claim 6 , wherein the empty detector is operable to determine whether the specified memory location is empty by:

determining whether the specified memory location has an address contained in a first address range or in a second address range; and

determining whether the specified memory location is empty based at least partially on contents of the specified memory location and on whether the address of the specified memory location is contained in the first address range or the second address range.

8. The system of claim 6 , further comprising:

a write scrambler operable to scramble the data before storage in the memory; and

a read de-scrambler operable to de-scramble the data after retrieval from the memory.

9. The system of claim 6 , wherein the empty detector is operable to determine whether the specified memory location is empty by comparing the contents of the specified memory location to an erase state.

10. The system of claim 6 , further comprising a memory controller coupled to the empty detector and operable to control storage of data in and retrieval of data from the memory.

11. The system of claim 6 , wherein:

the empty detector is operable to set a flag indicating whether the specified memory location is empty; and

the memory controller is operable to:

store a value in the specified memory location when the flag indicates that the specified memory location is empty; and

clear the specified memory location and then store the value in the specified memory location when the flag indicates that the specified memory location is not empty.

12. A method comprising:

identifying a specified memory location in a memory;

determining whether the specified memory location has an address contained in a first address range or in a second address range; and

determining whether the specified memory location is empty based at least partially on contents of the specified memory location and on whether the address of the specified memory location is contained in the first address range or the second address range, wherein determining whether the specified memory location is empty comprises comparing the contents of the specified memory location to an erase state, and wherein the erase state comprises a predetermined value.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2009
From: ADVANCED MICRO DEVICES, INC.
To: AMD TECHNOLOGIES HOLDINGS, INC.
Reel/Frame 022764/0488 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2009
From: AMD TECHNOLOGIES HOLDINGS, INC.
To: GLOBALFOUNDRIES INC.
Reel/Frame 022764/0544 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 29, 2004
From: NATIONAL SEMICONDUCTOR CORPORATION
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 015310/0456 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 28, 2003
From: GETZIN, LAWRENCE D.; FENSORE, DAVID J.
To: NATIONAL SEMICONDUCTOR CORPORATION
Reel/Frame 014023/0815 →