IP Library Granted Patent US 6,924,161
Granted Patent B2
US 6,924,161 · App. 10/427,237 · Granted Aug 2, 2005

Protective side wall passivation for VCSEL chips

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Quick Facts
Patent No.
US 6,924,161
App. No.
10/427,237
Granted
Aug 2, 2005
Kind
B2
Abstract

Methods for sealing or passivating the edges of chips such as vertical cavity surface emitting lasers (VCSEL) is disclosed. One method includes oxidizing the edges of die at the wafer level prior to cutting the wafer into a plurality of die. This may be accomplished by etching a channel along the streets between die, followed by oxidizing the channel walls. The oxidation preferably oxidizes the aluminum bearing layers that are exposed by the channel walls inward for distance. Aluminum bearing layers, including AlAs and AlGaAs, may be oxidized to a stable native oxide that is resistant to further oxidation by the environment. After oxidation, the wafer can be cut along the channels into a number of die, each having a protective oxide layer on the side surfaces.

Claims (27)

1. A method for sealing the edges of a die having an aluminum bearing layer disposed therein, the method comprising the steps of:

providing a wafer having a major top surface, a transverse depth, and a plurality of die separated by streets, at least some of said die having one or more aluminum bearing layers disposed therein;

forming one or more channels into said wafer along said streets, said channels having a channel depth and channel walls, said channel depth extending to a depth sufficient to expose each of said one or more aluminum bearing layers at the channel wall;

exposing said wafer to an oxidizing environment to laterally oxidize said one or more aluminum bearing layers for a distance from said channel wall of between about 10 to 15 microns;

removing said wafer from the oxidizing environment; and

dicing said wafer along said channels into a number of discrete die.

2. A method as recited in claim 1 , wherein said oxidizing environment includes steam.

3. A method as recited in claim 1 , wherein said oxidizing environment includes oxygen.

4. A method as recited in claim 1 , wherein said aluminum bearing layer includes AlAs.

5. A method as recited in claim 1 , wherein said aluminum bearing layer include AlGaAs.

6. A method as recited in claim 1 , wherein said one or more channels are formed using an etch.

7. A method as recited in claim 6 , wherein the etch is a chemical etch or a plasma etch.

8. A method as recited in claim 1 , wherein said one or more channels are formed using ion milling.

9. A method for sealing the edges of a die having an aluminum bearing layer disposed therein, the method comprising the steps of:

providing a wafer having a major top surface, a transverse depth, and a plurality of die separated by streets, at least some of said die having one or more aluminum bearing layers disposed therein, said top surface comprising a top passivation layer that protects said at least one aluminum bearing layer from oxidation;

forming one or more channels into said wafer along said streets, said channels having a channel depth and channel walls, said channel depth extending to a depth sufficient to expose each of said one or more aluminum bearing layers at the channel wall;

exposing said wafer to an oxidizing environment to laterally oxidize said one or more aluminum bearing layers for a distance from said channel wall;

removing said wafer from the oxidizing environment; and

dicing said wafer along said channels into a number of discrete die.

10. A method as recited in claim 9 , wherein said oxidizing environment laterally oxidizes said one or more aluminum bearing layer a distance from said channel wall of at least about 5 microns.

11. A method as recited in claim 9 , wherein said oxidizing environment laterally oxidizes said one or more aluminum bearing layer a distance from said channel wall of between about 10 to 15 microns.

12. A method for sealing the edges of a die having an aluminum bearing layer disposed therein, the method comprising the steps of:

providing a wafer having a major top surface, a transverse depth, and a plurality of die separated by streets, at least some of said die having one or more aluminum bearing layers disposed therein,

forming one or more channels into said wafer along said streets, said channels having a channel depth and channel walls, said channel depth extending to a depth sufficient to expose each of said one or more aluminum bearing layers at the channel wall;

exposing said wafer to an oxidizing environment at a temperature of about 440° C. to laterally oxidize said one or more aluminum bearing layers for a distance from said channel wall;

removing said wafer from the oxidizing environment; and

dicing said wafer along said channels into a number of discrete die.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: FINISAR CORPORATION
To: II-VI DELAWARE, INC.
Reel/Frame 052286/0001 →