Molecular wire content addressable memory
View Patent ↗In one embodiment, a content addressable memory (CAM), includes: a word line driver configured to provide a driving signal; a tag memory including M word lines traversing through the tag memory and intersecting with 2N bit lines, where M and N are each suitable integer values, where each word line and each bit line is a single molecular wire; a search enable circuitry coupled to the word line driver and configured to allow the driving signal to be driven onto a subset of the word lines in the tag memory; and a match detection circuit coupled to the tag memory and configured to detect current flow on the horizontal word lines.
1. A content addressable memory (CAM), comprising:
a word line driver configured to provide a driving signal;
a tag memory including M word lines traversing through the tag memory and intersecting with 2N bit lines, where M and N are each suitable integer values, where each word line and each bit line comprises a single molecular wire;
a search enable circuitry coupled to the word line driver and configured to allow the driving signal to be driven onto a subset of the word lines in the tag memory; and
a match detection circuit coupled to the tag memory and configured to detect current flow on the horizontal word lines.
2. The content addressable memory of claim 1 , wherein the search enable circuitry includes 2 [log 2 M] vertical address lines intersecting the word lines.
3. The content addressable memory of claim 2 , wherein each of the vertical address lines in the search enable circuitry comprises a single molecular wire.
4. The content addressable memory of claim 2 , wherein each of the vertical address lines in the search enable circuitry comprises a micron scale wire.
5. The content addressable memory of claim 4 , wherein the number of micron scale wires is K [log 2 M], where K is a small integer value greater than approximately four (4) and less than approximately ten (10).
6. The content addressable memory of claim 4 , wherein a transistor is randomly formed in at least some of the junctions of the word lines and the micron scale wires.
7. The content addressable memory of claim 2 , wherein the search enable circuitry includes an address driver coupled to each of the vertical address lines.
8. The content addressable memory of 7 , claim wherein the address driver comprises a plurality of address driver registers, each address driver register coupled to one of the vertical address lines.
9. The content addressable memory of claim 1 , further comprising:
an address enable circuitry configured to represent the unused locations in the CAM.
10. The content addressable memory of claim 9 , wherein the address enable circuitry includes a molecular wire crossing the word lines.
11. The content addressable memory of claim 9 , wherein the address enable circuitry includes a micron scale wire crossing the word lines.
12. The content addressable memory of claim 1 , wherein the tag memory includes a pattern driver coupled to the bit lines.
13. The content addressable memory of claim 12 , wherein the pattern driver comprises a plurality of multibit registers, each multibit register coupled to one of the bit lines.
14. The content addressable memory of claim 1 , wherein the match detection circuit comprises:
a plurality of diodes coupled to the word lines; and a sense amplifier coupled to the plurality of diodes.
15. The content addressable memory of claim 1 , wherein the tag memory is configured to store data values including “don't care” bits to provide a mechanism for storing variable width data in a fixed width of the CAM.
16. The content addressable memory of claim 1 , wherein a pair of junctions between a word line and a pair of bit lines in the tag memory encodes one of the bit values of “0,” “1,” and “X.”
17. The content addressable memory of claim 1 , wherein a pair of junctions between a word line and a pair of bit lines in the tag memory encodes a bit value of “U” which indicates an unused address.
18. A method of forming a content addressable memory (CAM), the method comprising:
providing a word line driver configured to provide a driving signal;
providing a tag memory including M word lines traversing through the tag memory and intersecting with 2N bit lines, where M and N are each suitable integer values, where each word line and each bit line comprises a single molecular wire;
providing a search enable circuitry coupled to the word line driver and configured to allow the driving signal to be driven onto a subset of the word lines in the tag memory; and
providing a match detection circuit coupled to the tag memory and configured to detect current flow on the horizontal word lines.
19. The method claim 18 , wherein the search enable circuitry includes 2 [log 2 M] vertical address lines intersecting the word lines.
20. The method of claim 19 , wherein each of the vertical address lines in the search enable circuitry comprises a single molecular wire.
21. The method of claim 19 , wherein each of the vertical address lines in the search enable circuitry comprises a micron scale wire.