Granted Patent B2

US 7,610,063 · App. 10/434,160 · Granted Oct 27, 2009

Abstract

Claims (45)

1. A method for identifying a circuit pack in a specific slot, where the circuit pack is connected to a single wire bus, the method comprising:

sending a plurality of circuit pack addresses over the single wire bus; and

identifying an address of the circuit pack in the specific slot based on the circuit pack in the specific slot being isolated and

responses received over the single wire bus from other circuit packs connected to the single wire bus, the responses being in response to the plurality of circuit pack addresses sent over the single wire bus, wherein the identified address of the circuit pack is one of the sent plurality of circuit pack addresses for which an acknowledgement was not received.

2. The method of claim 1 , further comprising:

determining, via the single wire bus, an address for each of a plurality of circuit packs connected to the single wire bus;

isolating the circuit pack in the specific slot; and wherein

the identifying step identifies the address of the circuit pack in the specific slot based on the determined addresses, the circuit pack in the specific slot being isolated and the responses received over the single wire bus from the other circuit packs connected to the single wire bus.

3. The method of claim 2 , wherein the sent plurality of circuit pack addresses are the determined addresses.

4. The method of claim 2 , further comprising:

sending the determined addresses over the single wire bus after the isolating step;

receiving acknowledgements from the other circuit packs connected to the single wire bus in response to the sending step; and wherein

the identifying step identifies the address of the circuit pack in the specific slot as the one determined address sent over the single wire bus for which an acknowledgement is not received.

5. The method of claim 4 , wherein the receiving step receives the acknowledgements from storage devices associated with the other circuit packs.

6. The method of claim 2 , wherein determining step comprises:

sending a plurality of circuit pack addresses over the single wire bus; and

determining one of the sent plurality of circuit pack addresses is an address of one of the plurality of circuit packs when a acknowledgement is received in response to the one of the sent plurality of circuit pack addresses.

7. The method of claim 2 , wherein the isolating step controls a switch, associated with the specific slot, to effectively disconnect the circuit pack in the specific slot from the single wire bus.

8. The method of claim 2 , comprising:

obtaining information on the circuit pack in the specific slot using the identified address; and

associating the obtained information with the specific slot.

9. The method of claim 8 , wherein the obtaining step obtains the information on the circuit pack in the specific slot from a storage device associated with the circuit pack in the specific slot.

10. The method of claim 1 , comprising:

obtaining information on the circuit pack in the specific slot using the identified address; and

associating the obtained information with the specific slot.

11. The method of claim 10 . wherein the obtaining step obtains the information on the circuit pack in the specific slot from a storage device associated with the circuit pack in the specific slot.

12. A circuit pack isolation system, comprising:

a single wire bus;

a plurality of switches, each switch associated with a slot for a circuit pack, each switch for selectively connecting the circuit pack in the associated slot to the single wire bus; and

a control circuit pack configured to send a plurality of circuit pack addresses and to send an enable signal to isolate a first circuit pack in the associated slot from the single wire bus and to identify the first circuit pack having one of the sent plurality of circuit pack addresses in the associated slot based on at least one response received over the single wire bus in response to the sent plurality of circuit pack addresses, wherein the isolated first circuit pack is identified as the circuit pack having the one of the plurality of circuit pack addresses for which an acknowledgement was not received at the control circuit pack in response to the sent plurality of addresses.

13. The system of claim 12 , further comprising:

a storage device associated with each circuit pack.

14. The system of claim 13 , wherein each storage device stores information regarding the associated circuit pack.

15. The system of claim 14 , wherein the information includes at least one of an address of the circuit pack and version information on the circuit pack.

16. The system of claim 12 , wherein at least one of the switches is an optically isolated switch.

17. A method for identifying a circuit pack in a specific slot, where the circuit pack is connected to a single wire bus, the method comprising:

sending a first set of circuit pack addresses over a single wire;

receiving first responses to the first set of circuit pack addresses;

determining a plurality of circuit packs inserted into a plurality of slots based on the first received responses;

isolating one of the plurality of slots;

sending a second set of circuit pack addresses over the single wire bus;

receiving second responses to the second set of circuit pack address; and

determining a specific circuit pack is in the isolated one of the plurality of slots based on the second responses.

18. The method of claim 17 , wherein the second set of circuit pack addresses includes a circuit pack address of the first set corresponding to each of the plurality of circuit packs.

19. The method of claim 18 , wherein the specific circuit pack corresponds to one of the plurality of circuit packs that does not respond to any of the second set of circuit pack addresses.

Assignments (11)