Image processing method and analog front end circuit
View Patent ↗An image processing method and analog front end circuit are described. An analog signal is converted to digital form to obtain a digital signal by increasing a conversion resolution value of an analog-to-digital converter module. The digital signal is subsequently amplified to obtain an amplified digital output signal.
1. A method comprising:
subdividing a range of an analog signal received at an analog-to-digital converter module into a plurality of intervals;
assigning a binary word to each interval of said plurality of intervals, said binary word representing a digital representation of any signal within said each interval, said analog-to-digital converter module assigning a predetermined additional number of bits to said binary word of said each interval to increase accuracy of a digital representation of said analog signal;
converting said analog signal to digital form to obtain a digital signal; and
amplifying said digital signal to obtain an amplified digital output signal.
2. The method according to claim 1 , further comprising:
transmitting said digital signal to a digital multiplier module.
3. The method according to claim 1 , wherein said analog-to-digital converter module is an analog-to-digital pipeline converter.
4. The method according to claim 1 , wherein said predetermined additional number of bits is in a range of 4 to 6 bits and said binary word is in the range of 14 to 20 bits.
5. A circuit comprising:
an analog-to-digital converter module to subdivide a range of a received analog signal into a plurality of intervals, to assign a binary word to each interval of said plurality of intervals, said binary word representing a digital representation of any signal within said each interval, said analog-to-digital converter module assigning a predetermined additional number of bits to said binary word of said each interval to increase accuracy of a digital representation of said analog signal, and to convert said analog signal to digital form to obtain a digital signal; and
a digital multiplier module coupled to said analog-to-digital converter module to amplify said digital signal to obtain an amplified digital output signal.
6. The circuit according to claim 5 , wherein said analog-to-digital converter module transmits said digital signal to said digital multiplier module.
7. The circuit according to claim 5 , wherein said analog-to-digital converter module is an analog-to-digital pipeline converter.
8. The circuit according to claim 5 , wherein said predetermined additional number of bits is in a range of 4 to 6 bits and said binary word is in the range of 14 to 20 bits.
9. The circuit according to claim 5 , wherein said analog-to-digital converter module receives said analog signal from a charge-coupled device sensor.
10. A method to manufacture a circuit comprising:
coupling an input of a digital multiplier module to an output of an analog-to-digital converter module;
said analog-to-digital converter module to subdivide a range of a received analog signal into a plurality of intervals, to assign a binary word to each interval of said plurality of intervals, said binary word representing a digital representation of any signal within said each interval, said analog-to-digital converter module assigning a predetermined additional number of bits to said binary word of said each interval to increase accuracy of a digital representation of said analog signal, and to convert an said analog signal to digital form to obtain a digital signal, and
said digital multiplier module to amplify said digital signal to obtain an amplified digital output signal.
11. The method according to claim 10 , further comprising:
coupling a charge-coupled device sensor to an input of said analog-to-digital converter module, said analog-to-digital converter module to receive said analog signal from said charge-coupled device sensor.