IP Library Granted Patent US 7,146,285
Granted Patent B2
US 7,146,285 · App. 10/440,581 · Granted Dec 5, 2006

Integrated circuit with parameter measurement

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Quick Facts
Patent No.
US 7,146,285
App. No.
10/440,581
Granted
Dec 5, 2006
Kind
B2
Abstract

Embodiments of the present invention provide an integrated circuit. In one embodiment, the integrated circuit comprises logic blocks and a measurement circuit. The measurement circuit is configured to measure internal operating parameters of the integrated circuit to obtain operating parameter data and provide the operating parameter data for evaluation and configuration of the integrated circuit and the logic blocks.

Claims (40)

1. An integrated circuit, comprising:

logic blocks providing internal signals;

a measurement circuit configured to receive the internal signals from the logic blocks and to measure internal operating parameters of the integrated circuit based on the received internal signals to thereby obtain operating parameter data and provide the operating parameter data; and

a first control circuit configured to receive the operating parameter data and control evaluation of the operating parameter data to thereby obtain configuration data adapted to configure the integrated circuit to affect the internal operating parameters.

2. The integrated circuit of claim 1 , wherein the measurement circuit is configured to measure a data transfer rate parameter of the integrated circuit.

3. The integrated circuit of claim 1 , wherein the measurement circuit is configured to measure a bandwidth operating parameter of the integrated circuit.

4. The integrated circuit of claim 1 , wherein the measurement circuit is configured to measure interrupt latency in the integrated circuit.

5. The integrated circuit of claim 1 , wherein the measurement circuit is configured to measure DMA request latency in the integrated circuit.

6. The integrated circuit of claim 1 , wherein the measurement circuit is configured to measure bus hold off time in the integrated circuit.

7. The integrated circuit of claim 1 , wherein the measurement circuit is configured to measure continuous addresses accessed in a memory.

8. The integrated circuit of claim 1 , wherein the measurement circuit comprises a gated counter comprising a counter that counts for a gated period.

9. The integrated circuit of claim 8 , wherein the gated period is determined by one of the following: a time period determined by a timer, an operational unit, and a set of operating parameter events.

10. The integrated circuit of claim 1 , wherein the measurement circuit is configured to measure the internal operating parameters during each function of a multiple function system to thereby obtain the operating parameter data for each function of the multiple function system and provide the operating parameter data for each function of the multiple function system to configure the integrated circuit during each function of the multiple function system.

11. The integrated circuit of claim 1 , comprising a configuration circuit configured to receive the configuration data through external inputs to configure the integrated circuit to affect the internal operating parameters.

12. The integrated circuit of claim 1 , comprising:

a configuration circuit configured to receive the configuration data from the first control circuit to configure the integrated circuit to affect the internal operating parameters, wherein the first control circuit is configured to evaluate the operating parameter data to thereby obtain the configuration data based on the operating parameter data.

13. The integrated circuit of claim 12 , wherein the configuration circuit comprises a second control circuit, wherein the first control circuit and the second control circuit are configured to use the configuration data to change performance characteristics of the integrated circuit to affect the internal operating parameters.

14. The integrated circuit of claim 12 , wherein the first control circuit is configured to receive the configuration data through external inputs and configure the configuration circuit.

15. An integrated circuit, comprising:

logic blocks providing internal signals;

a measurement device configured to receive the internal signals from the logic blocks and to measure internal operating parameters of the integrated circuit based on the received internal signals to thereby obtain operating parameter data and provide the operating parameter data for evaluation and to thereby obtain configuration data; and

a configuration circuit configured to receive the configuration data and set priority levels in the integrated circuit based on the received configuration data to affect the internal operating parameters.

16. The integrated circuit of claim 15 , wherein the measurement device is a gated counter comprising a counter that counts for a gated period.

17. The integrated circuit of claim 15 , wherein the measurement device is a gated counter comprising a counter that counts for a gated period that is determine by one of the following: a time period determined by a timer, an operational unit and a set of operating parameter events.

18. A method of configuring an integrated circuit, comprising:

providing internal signals from logic blocks in the integrated circuit;

receiving the internal signals from the logic blocks at a measurement circuit in the integrated circuit;

measuring internal operating parameters of the integrated circuit based on the received internal signals;

obtaining operating parameter data based on the measured internal operating parameters;

providing the operating parameter data for evaluation to obtain configuration data; and

configuring the integrated circuit based on the configuration data to affect the internal operating parameters.

19. The method of claim 18 , wherein measuring internal operating parameters comprises measuring a data transfer rate parameter of the integrated circuit.

20. The method of claim 18 , wherein obtaining operating parameter data comprises obtaining a count as the operating parameter data.

21. The integrated circuit of claim 12 , wherein the configuration circuit comprises a second control circuit and the configuration data comprises priority level data used during operation of the second control circuit.

22. The method of claim 18 , wherein:

measuring internal operating parameters comprises measuring internal operating parameters during each function of a multiple function peripheral; and

obtaining operating parameter data comprises obtaining operating parameter data for each function of the multiple function peripheral based on the internal operating parameters measured during each function of the multiple function peripheral.

23. The method of claim 22 , comprising;

evaluating the obtained operating parameter data for each function of the multiple function peripheral to thereby obtain configuration data for each function of the multiple function peripheral; and

configuring each function of the multiple function peripheral based on the configuration data obtained for each function of the multiple function peripheral.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED AT REEL: 017206 FRAME: 0666. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2016
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 038632/0662 →
MERGER Recorded Jan 14, 2016
From: AVENPORE PROPERTIES LIMITED LIABILITY COMPANY
To: CALLAHAN CELLULAR L.L.C.
Reel/Frame 037528/0868 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 13, 2012
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVENPORE PROPERTIES LIMITED LIABILITY COMPANY
Reel/Frame 027858/0378 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 22, 2006
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP PTE. LTD.
Reel/Frame 017206/0666 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 21, 2003
From: WHELESS, THOMAS OMEGA JR.; TAYLOR, RICHARD DAVID; KEITHLEY, DOUGLAS GENE
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 014062/0385 →