Receiver circuit and method of processing a received signal
View Patent ↗A receiver circuit of a cordless communication system has an analog signal processing section with a channel selection filter and a digital signal processing section which is connected downstream of the latter and has a group delay equalizer. The group delay equalizer is used to equalize the digital distortion caused by the channel selection filter.
1. A receiver circuit for a cordless communication system, the receiver circuit comprising:
an analog signal processing section having a channel selection filter;
a digital signal processing section connected downstream of said analog signal process section, said digital signal processing section having a group delay equalizer for equalizing at least signal distortion caused by said channel selection filter;
a limiter connected to said analog processing section; and
a sampling stage operating in an oversampling mode and generating a digital output signal with a word length 1 , said sampling stage connected between said limiter and said digital signal processing section.
2. The receiver circuit according to claim 1 , wherein said group delay equalizer is an allpass filter.
3. The receiver circuit according to claim 1 , wherein said digital signal processing section has a digital decimation filter stage connected upstream of said group delay equalizer in a signal path, said group delay equalizer equalizes signal distortions caused by said digital decimation filter stage.
4. The receiver circuit according to claim 1 , wherein said digital signal processing section has an amplitude equalizer for equalizing the signal distortion caused by said channel selection filter.
5. The receiver circuit according to claim 1 , wherein the cordless communication system uses FSK modulation.
6. A method for processing a received signal in a cordless communication system, which comprises the steps of:
carrying out a channel selection using an analog channel selection filter;
digitizing a received signal by signal limitation and oversampling of a limited signal, an output signal with a word length 1 being generated during the oversampling; and
using a digital group delay equalizer for equalizing signal distortion caused by the analog channel selection filter.
7. The method according to claim 6 , which further comprises performing filtering and decimation upstream of the digital group delay equalizer in a signal path, and the digital group delay equalization also includes equalization of signal distortions caused by the filtering and decimation.
8. The method according to claim 6 , which further comprises performing amplitude equalization to equalize signal distortion caused by the analog channel selection filter.
9. The method according to claim 6 , which further comprises frequency shift key modulating the received signal.