IP Library Granted Patent US 7,076,680
Granted Patent B1
US 7,076,680 · App. 10/459,196 · Granted Jul 11, 2006

Method and apparatus for providing skew compensation using a self-timed source-synchronous network

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,076,680
App. No.
10/459,196
Granted
Jul 11, 2006
Kind
B1
Abstract

One embodiment of the present invention provides a system that provides skew compensation for communications across a source-synchronous self-timed network. During each clock period, the system allows multiple synchronous transmitters to each transmit one data element and to assert one acknowledgement on a transmit clock line into the self-timed network. In doing so, the multiple synchronous transmitters do not wait for requests from the self-timed network before transmitting a subsequent data element. Similarly, during each clock period, the system allows multiple synchronous receivers to accept one data element from and to assert one request on a receive clock line coupled into the self-timed network. In doing so, the multiple synchronous receivers do not wait for acknowledgments from the self-timed network before receiving a subsequent data element. The self-timed network is configured to tolerate bounded skew between the multiple synchronous transmitters and multiple synchronous receivers.

Claims (55)

1. A method for providing skew compensation through a self-timed network that supports source-synchronous communication, comprising:

allowing multiple synchronous transmitters to transmit one data element and to assert one acknowledgement on a transmit clock line into the self-timed network during each clock period;

wherein the multiple synchronous transmitters do not wait for requests from the self-timed network before transmitting a subsequent data element; and

allowing multiple synchronous receivers to accept one data element from and to assert one request on a receive clock line coupled into the self-timed network during each clock period;

wherein the multiple synchronous receivers do not wait for acknowledgments from the self-timed network before receiving a subsequent data element;

wherein the self-timed network tolerates bounded skew between the multiple synchronous transmitters and multiple synchronous receivers.

2. The method of claim 1 , further comprising routing data elements across the self-timed network between the multiple synchronous transmitters and the multiple synchronous receivers.

3. The method of claim 2 , wherein the routing of data elements across the self-timed network is regulated using Muller C-elements.

4. The method of claim 2 , wherein routing the data elements across the self-timed network involves using a two-dimensional mesh to route the data elements.

5. The method of claim 2 , wherein routing the data elements across the self-timed network involves using intermediate routing nodes that generate a response before a subsequent input arrives, whereby data elements in-flight across the self-timed network do not stack up at the intermediate routing nodes.

6. The method of claim 1 , further comprising queuing data between the self-timed network and the multiple synchronous receivers using first-in-first-out (FIFO) buffers.

7. The method of claim 1 , wherein the multiple synchronous transmitters and the multiple synchronous receivers do not have exactly matching frequencies.

8. The method of claim 1 , wherein the multiple synchronous transmitters and the multiple synchronous receivers operate at multiples of a common clock frequency.

9. An apparatus that provides skew compensation during source-synchronous communication, comprising:

a self-timed network;

multiple synchronous transmitters coupled to the self-timed network;

wherein during each clock period, each of the multiple synchronous transmitters is configured to transmit one data element and to assert one acknowledgement on a transmit clock line into the self-timed network;

wherein the multiple synchronous transmitters do not wait for requests from the self-timed network before transmitting a subsequent data element; and

multiple synchronous receivers coupled to the self-timed network;

wherein during each clock period, each of the multiple synchronous receivers is configured to accept one data element from and to assert one request on a receive clock line into the self-timed network;

wherein the multiple synchronous receivers do not wait for acknowledgments from the self-timed network before receiving a subsequent data element;

wherein the self-timed network tolerates bounded skew between the multiple synchronous transmitters and multiple synchronous receivers.

10. The apparatus of claim 9 , wherein the self-timed network is configured to route data elements across the self-timed network between the multiple synchronous transmitters and the multiple synchronous receivers.

11. The apparatus of claim 10 , wherein the routing of data elements across the self-timed network is regulated using Muller C-elements.

12. The apparatus of claim 9 , wherein the self-timed network is configured as a two-dimensional mesh.

13. The apparatus of claim 10 , wherein the self-timed network is comprised of intermediate routing nodes that are configured to generate a response before a subsequent input arrives, whereby data elements in-flight across the self-timed network do not stack up at the intermediate routing nodes.

14. The apparatus of claim 9 , further comprising multiple first-in-first-out (FIFO) buffers coupled between the self-timed network and the multiple synchronous receivers for queuing data in transit between the self-timed network and the multiple synchronous receivers.

15. The apparatus of claim 9 , wherein the multiple synchronous transmitters and the multiple synchronous receivers do not have exactly matching frequencies.

16. The apparatus of claim 9 , wherein the multiple synchronous transmitters and the multiple synchronous receivers operate at multiples of a common clock frequency.

17. A computer system that provides skew compensation during source-synchronous communication between computing nodes, comprising:

multiple computing nodes;

a self-timed network;

multiple synchronous transmitters coupled between the multiple computing nodes and the self-timed network;

wherein during each clock period, each of the multiple synchronous transmitters is configured to transmit one data element and to assert one acknowledgement on a transmit clock line into the self-timed network;

wherein the multiple synchronous transmitters do not wait for requests from the self-timed network before transmitting a subsequent data element; and

multiple synchronous receivers coupled between the multiple computing nodes and the self-timed network;

wherein during each clock period, each of the multiple synchronous receivers is configured to accept one data element from and to assert one request on a receive clock line into the self-timed network;

wherein the multiple synchronous receivers do not wait for acknowledgments from the self-timed network before receiving a subsequent data element;

wherein the self-timed network tolerates bounded skew between the multiple synchronous transmitters and multiple synchronous receivers.

18. The computer system of claim 17 , wherein the self-timed network is configured to route data elements across the self-timed network between the multiple synchronous transmitters and the multiple synchronous receivers.

19. The computer system of claim 18 , wherein the routing of data elements across the self-timed network is regulated using Muller C-elements.

20. The computer system of claim 17 , wherein the self-timed network is configured as a two-dimensional mesh.

21. The computer system of claim 17 , wherein the self-timed network is comprised of intermediate routing nodes that are configured to generate a response before a subsequent input arrives, whereby data elements in-flight across the self-timed network do not stack up at the intermediate routing nodes.

22. The computer system of claim 17 , further comprising multiple first-in-first-out (FIFO) buffers coupled between the self-timed network and the multiple synchronous receivers for queuing data in transit between the self-timed network and the multiple synchronous receivers.

23. The computer system of claim 17 , wherein the multiple synchronous transmitters and the multiple synchronous receivers do not have exactly matching frequencies.

24. The computer system of claim 17 , wherein the multiple synchronous transmitters and the multiple synchronous receivers operate at multiples of a common clock frequency.

25. A means for providing skew compensation during source-synchronous communication, comprising:

a self-timed communication means;

multiple synchronous transmitting means coupled to the self-timed communication means;

wherein during each clock period, each of the multiple synchronous transmitting means is configured to transmit one data element and to assert one acknowledgement on a transmit clock line into the self-timed communication means;

wherein the multiple synchronous transmitting means do not wait for requests from the self-timed network before transmitting a subsequent data element; and

multiple synchronous receiving means coupled to the self-timed network;

wherein during each clock period, each of the multiple synchronous receiving means is configured to accept one data element from and to assert one request on a receive clock line into the self-timed communication means;

wherein the multiple synchronous receiving means do not wait for acknowledgments from the self-timed network before receiving a subsequent data element;

wherein the self-timed network tolerates bounded skew between the multiple synchronous transmitting means and multiple synchronous receiving means.

Assignments (1)
MERGER AND CHANGE OF NAME Recorded Dec 16, 2015
From: ORACLE USA, INC.; SUN MICROSYSTEMS, INC.; ORACLE AMERICA, INC.
To: ORACLE AMERICA, INC.
Reel/Frame 037302/0579 →