Level converter circuit and a liquid crystal display device employing the same
View Patent ↗A level converter circuit includes an input terminal adapted to be supplied with a signal swinging from a first voltage to a second voltage lower than the first voltage; a first transistor having a gate electrode connected to the input terminal, and a source electrode connected to ground potential; a second transistor having a gate electrode connected to a drain electrode of the first transistor, a source electrode connected to a supply voltage, and a drain electrode connected to an output terminal; a load circuit connected between the gate electrode of the second transistor and the supply voltage; a third transistor having a source electrode connected to the input terminal, a drain electrode connected to the output terminal, and a gate electrode supplied with a DC voltage higher than the second voltage and lower than the first voltage. The level converter circuit outputs a third voltage higher than the second voltage when the input terminal is supplied with the first voltage, and the level converter circuit outputs the second voltage when the input terminal is supplied with the second voltage.
1. A display device comprising a plurality of pixels and a driver circuit for supplying a signal to said plurality of pixels,
wherein said driver circuit includes a plurality of level converter circuits,
each of said plurality of level converter circuits comprises:
an input terminal adapted to be supplied with a signal swinging between a first voltage and a second voltage lower than said first voltage;
an output terminal for outputting a signal swinging between a third voltage higher than said first voltage and said second voltage;
a first transistor of a first conductivity type;
a second transistor of a second conductivity type;
a third transistor of said first conductivity type; and
a load circuit;
wherein said input terminal is coupled to a gate electrode of said first transistor and a source region of said third transistor,
said output terminal is coupled to a source region of said second transistor and a drain region of said third transistor,
a drain region of said first transistor is coupled to a gate electrode of said second transistor,
a source region of said first transistor is coupled to ground potential,
a drain region of said second transistor is coupled to a power supply line for supplying said third voltage,
a gate electrode of said third transistor is supplied with a dc voltage higher than said second voltage and equal to or lower than said first voltage,
said load circuit is coupled between said gate electrode of said second transistor and said power supply line, and
wherein said output terminal outputs said third voltage higher than said second voltage when said input terminal is supplied with said first voltage, and said output terminal outputs said second voltage when said input terminal is supplied with said second voltage.
2. A display device according to claim 1 , wherein a semiconductor layer of said first transistor is made of polysilicon.
3. A display device according to claim 1 , wherein said load circuit is formed of a transistor of said second conductivity type.
4. A display device according to claim 1 , wherein each of said plurality of pixels is provided with a transistor of said second conductivity type.
5. A display device according to claim 1 , wherein said display device is a liquid crystal display device.