Light emitting semiconductor package
View Patent ↗A light emitting semiconductor package ( 250 ) has a semiconductor chip ( 252 ) with a surface with one or more light emitting devices ( 254 ) formed on or in the surface. A cap ( 256 ) is bonded to the surface of the chip ( 252 ) to encapsulate the devices ( 254 ). The cap has one or more regions ( 258 ) transparent to light emitted by the light emitting devices ( 254 ). The cap has been bonded to the semiconductor chip ( 252 ) at the wafer stage prior to separation of the wafer into individual packages.
1. An light emitting semiconductor package including:
a) a semiconductor chip having a top surface and a bottom surface and having at least one light emitting device formed in the chip which emits electromagnetic radiation at one or more wavelengths from the top surface;
b) a first hollow cap having a central portion and a first perimeter wall extending from the perimeter edge of the central portion with the free edge of the first perimeter wall bonded to the top surface to provide a first cavity and which, in plan view, overlays part or all of at least one light emitting device, said central portion including at least one region which is at least substantially transparent or translucent to electromagnetic radiation at said one or more wavelengths and is formed within the first cavity.
2. The package of claim 1 wherein the at least one region refracts said electromagnetic radiation emitted by said at least one device.
3. The package of claim 1 wherein the cap further includes at least one attachment means for attaching an electromagnetic radiation transmitting cable or fiber to the cap, whereby at least some electromagnetic radiation emitted from the at least one device passes through said at least one region into the cable or fiber.
4. The package of claim 3 wherein the at least one attachment means includes a second perimeter wall extending from the periphery of the central portion away from the first perimeter wall.
5. The package of claim 3 wherein the at least one attachment means includes at least one recess in the central portion.
6. The package of claim 1 further including a second cap bonded to the bottom surface of the chip.
7. The package of claim 1 further including a second cap bonded to the bottom surface of the chip, said second cap, in plan view, overlaying part or all of the at least one device.