Control arrangement

1. An arrangement comprising:

a DC motor,

current supply means,

an electrical relay through which current is supplied, in use, from the current supply means to the motor, and

control means operable to provide a relay make signal and a relay break signal to control the state of the relay to respectively make and break a connection to the current supply means, wherein the control means is further operable to enable or disable the current supply means and includes first delay means operable to delay enabling the current supply means until after a relay make signal has been provided, to allow the relay to make the connection before current supply commences, and second delay means operable to delay a relay break signal until after the current supply means has been disabled, in the event that current supply to the electrical relay is to cease,

and wherein the arrangement further comprises current sensing means operable to measure the current being supplied by the current supply means and the control means is operable to test whether the magnitude of the current exceeds a predetermined limit and, if so, disable the current supply means for a predetermined time and, at the end of said predetermined time, test whether the magnitude of the current exceeds said predetermined limit.

2. An arrangement according to claim 1 , wherein the control means comprises relay control means operable to provide relay make and break signals, current control means operable to control the current supply means, central control means operable to provide a common signal to the relay control means and to the current control means to indicate if the electrical relay is required to supply current or not, the first delay means being operable to delay receipt by the current control means of a common signal from the central control means.

3. An arrangement according to claim 2 , wherein the first delay means comprises an input for receiving common signals, a time constant circuit, and a switching circuit connected to the input through the time constant circuit and providing an output to control the current control means, whereby the output is delayed relative to the common signal at the input, by operation of the time constant circuit.

4. An arrangement according to claim 1 , wherein the current supply means comprises a switching member which enables or disables the current supply.

5. An arrangement according to claim 4 , wherein the switching member is a semiconductor.

6. An arrangement according to claim 2 , wherein the current supply means comprises a switching member which enables or disables the current supply, and wherein the current supply means comprises a bias arrangement tending to hold a control terminal of the switching member at a first state, and an override arrangement operable to override the bias arrangement to hold the control terminal at a second state or to release the bias arrangement to hold the control terminal at the first state, the bias arrangement being controlled by a said common signal.

7. An arrangement according to claim 6 , wherein the bias arrangement comprises a bipolar transistor which connects the control terminal to a power rail when the transistor is on or off, and has a base connected to a voltage level which holds the transistor on or off, respectively, unless overridden, the override arrangement being operable to connect the base to an alternative voltage level which holds the transistor off or on, respectively.

8. An arrangement according to claim 2 , wherein the relay control means comprises a transistor switch circuit controlled by common signals from the central control means to switch the state of the relay.

9. An arrangement according to claim 8 , wherein the transistor switch circuit switches coil current to the relay.

10. An arrangement according to claim 9 , wherein the second delay means is operable to maintain the coil current for a delay period after the state of the common signal changes.

11. An arrangement according to claim 1 , wherein the current sensing means comprises a series resistor carrying current to the relay, and sensing means operable to sense the voltage across the resistor.

12. An arrangement according to claim 11 , wherein the output of The sensing means is applied to disable the current supply means in the event that excessive current is sensed and is applied through delay means to re-enable the current supply means after a period set by the delay means.

13. An arrangement according to claim 1 , comprising timer means operable to detect the event that excessive current is sensed repeatedly over a period in excess of a predetermined length of time, and wherein the timer means is operable to signal the occurrence of said event to the control means and the control means is operable to respond to the said event by preventing the current supply means being re-enabled.

14. An arrangement according to claim 13 , wherein the control means comprises relay control means operable to provide relay make and break signals, current control means operable to control the current supply means, central control means operable to provide a common signal to the relay control means and to the current control means to indicate if the electrical relay is required to supply current or not, the first delay means being operable to delay receipt by the current control means of a common signal from the central control means.

15. An arrangement according to claim 14 , wherein the first delay means comprises an input for receiving common signals, a time constant circuit, and a switching circuit connected to the input through the time constant circuit and providing an output to control the current control means, whereby the output is delayed relative to the common signal at the input, by operation of the time constant circuit.

16. An arrangement according to claim 13 , wherein the current supply means comprises a switching member which enables or disables the current supply.

17. An arrangement according to claim 16 , wherein the switching member is a semiconductor.

18. An arrangement according to claim 13 , wherein the current supply means comprises a switching member which enables or disables the current supply, and wherein the current supply means comprises a bias arrangement tending to hold a control terminal of the switching member at a first state, and an override arrangement operable to override the bias arrangement to hold the control terminal at a second state or to release the bias arrangement to hold the control terminal at the first state, the bias arrangement being controlled by a said common signal.

19. An arrangement according to claim 18 , wherein the bias arrangement comprises a bipolar transistor which connects the control terminal to a power rail when the transistor is on or off, and has a base connected to a voltage level which holds the transistor on or off, respectively, unless overridden, the override arrangement being operable to connect the base to an alternative voltage level which holds the transistor off or on, respectively.

20. An arrangement according to claim 13 , wherein the relay control means comprises a transistor switch circuit controlled by common signals from the central control means to switch the state of the relay.

21. An arrangement according to claim 20 , wherein the transistor switch circuit switches coil current to the relay.

22. An arrangement according to claim 21 , wherein the second delay means is operable to maintain the coil current for a delay period after the state of the common signal changes.

23. An arrangement according to claim 13 , wherein the current sensing means comprises a series resistor carrying current to the relay, and sensing means operable to sense the voltage across the resistor.

24. An arrangement according to claim 23 , wherein the output of the sensing means is applied to disable the current supply means in the event that excessive current is sensed and is applied through delay means to re-enable the current supply means after a period set by the delay means.