IP Library Granted Patent US 7,552,159
Granted Patent B2
US 7,552,159 · App. 10/474,120 · Granted Jun 23, 2009

Transform calculation device

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Quick Facts
Patent No.
US 7,552,159
App. No.
10/474,120
Granted
Jun 23, 2009
Kind
B2
Abstract

The present invention relates to a discrete transform calculation device (FFTP). The device has control means (CNTRL) which configure first and second memories (RAM 1 and RAM 2 ) according to the number of transforms used during a first processing. The device applies in particular to a demodulator which allows management of several Fourier transforms in parallel.

Claims (25)

1. A device for calculating discrete transforms, the device comprising:

a processing circuit

for calculating a first result using first samples and using a first type of transform from a plural number of discrete transform types; and

for calculating a second result using second samples that correspond to the first calculated result and using a second type of transform of the plural number of discrete transform types;

a first memory circuit for

storing the first samples and

for storing the second samples;

a second memory circuit independent from the first memory circuit for recording intermediate calculation results from the first type of transform and second type of transform, and

a control circuit for configuring the first and second memories as a function of a plural number of discrete transforms used during a first processing of the first type of transform.

2. A calculation device as claimed in claim 1 , wherein the control circuit is able to determine priorities for calculation of the first type of transform with respect to the second type of transform and wherein the first type of transform is a Fourier transform for demodulation and the second type of transform is an inverse Fourier transform.

3. A calculation device as claimed in claim 1 , wherein the first type of transform is a Fourier transform for demodulation and the second type of transform is an inverse Fourier transform used to synchronize the calculation device to a transmission corresponding to the received samples.

4. A discrete transform calculation method comprising:

in a first memory circuit,

storing samples used in calculating a result obtained from first type of a plural number of discrete transform types and

storing samples that correspond to the result from the first type of transform, and that are used in calculating a second type of the plural number of discrete transform types;

in a second memory circuit independent from the first memory, recording intermediate calculation results subsequently used in calculating the first type of transform and the second type of transform, and

using a control circuit, configuring the first and second memories as a function of the plural number of discrete transforms used during a first processing of the first type of transform.

5. A calculation method as claimed in claim 4 , further including a supplementary step of determining calculation priorities for the first type of transform with respect to the second type of transform and selecting between stored samples in response to determined priorities.

6. A calculation method as claimed in claim 5 , wherein the first type transform is used in demodulation processing.

7. A receiver for calculating discrete transforms, comprising:

a first memory circuit for

storing samples used in calculating a result obtained from a first type of a plural number of discrete transform types and

storing samples that correspond to the result from the first type of transform, and that are used in calculating a second type of the plural number of discrete transform types;

a second memory circuit independent from the first memory for recording intermediate calculation results subsequently used in calculating the first type of transform and second type of transform, and

a control circuit for configuring the first and second memories as a function of the plural number of discrete transform types used during a first processing of the first type of transform wherein the stored samples correspond to a received analog signal.

Assignments (11)
SECURITY AGREEMENT Recorded Jul 9, 2021
From: MAXLINEAR, INC.; MAXLINEAR COMMUNICATIONS, LLC; EXAR CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 056816/0089 →
RELEASE OF SECURITY INTEREST Recorded Jun 23, 2021
From: MUFG UNION BANK, N.A.
To: MAXLINEAR, INC.; EXAR CORPORATION; MAXLINEAR COMMUNICATIONS LLC
Reel/Frame 056656/0204 →
SUCCESSION OF AGENCY (REEL 042453 / FRAME 0001) Recorded Jul 1, 2020
From: JPMORGAN CHASE BANK, N.A.
To: MUFG UNION BANK, N.A.
Reel/Frame 053115/0842 →
SECURITY AGREEMENT Recorded May 12, 2017
From: MAXLINEAR, INC.; ENTROPIC COMMUNICATIONS, LLC (F/K/A ENTROPIC COMMUNICATIONS, INC.); EXAR CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042453/0001 →
MERGER AND CHANGE OF NAME Recorded May 19, 2015
From: ENTROPIC COMMUNICATIONS, INC.; EXCALIBUR SUBSIDIARY, LLC; ENTROPIC COMMUNICATIONS, LLC
To: ENTROPIC COMMUNICATIONS, LLC
Reel/Frame 035717/0628 →
MERGER AND CHANGE OF NAME Recorded May 18, 2015
From: EXCALIBUR ACQUISITION CORPORATION; ENTROPIC COMMUNICATIONS, INC.; ENTROPIC COMMUNICATIONS, INC.
To: ENTROPIC COMMUNICATIONS, INC.
Reel/Frame 035706/0267 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 3, 2012
From: TRIDENT MICROSYSTEMS, INC.; TRIDENT MICROSYSTEMS (FAR EAST) LTD.
To: ENTROPIC COMMUNICATIONS, INC.
Reel/Frame 028153/0440 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 13, 2010
From: NXP
To: NXP HOLDING 1 B.V.
Reel/Frame 023928/0489 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 13, 2010
From: TRIDENT MICROSYSTEMS (EUROPE) B.V.; NXP HOLDING 1 B.V.
To: TRIDENT MICROSYSTEMS (FAR EAST) LTD.
Reel/Frame 023928/0552 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2009
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: NXP B.V.
Reel/Frame 022856/0807 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 7, 2003
From: GAY-BELLILE, OLIVIER; MARCHAL, XAVIER
To: KONINKLIJKE PHILIPS ELECTRONICS N.V.
Reel/Frame 015006/0869 →