Method of manufacturing an electronic device
View Patent ↗A vertical interconnect ( 15 ) in an electronic device ( 10 ) is manufactured non-photolithographically. This is done by modifying a surface ( 20,30 ) of either a metal layer ( 3 ) or an intermediate layer of an electrically insulating material ( 21 ), and subsequently depositing a composition with a first and a second polymer. Phase separation of the two polymers will lead to a first ( 6 ) and a second sub-layer ( 7 ), of which the first sub-layer ( 6 ) is removed. An upper layer ( 9 ) of electrically conducting material can be deposited then or after a further etching step. This results in the vertical interconnect ( 15 ).
1. A method of manufacturing an electronic device provided with a substrate having a first side, at which first side are provided in that order a first electrically conducting region, an intermediate layer of electrically insulating material, and a second electrically conducting region, an electrically conducting vertical interconnect being present between said regions, characterized in that the method comprises the following steps:
modifying a surface at the first side of the substrate in accordance with a desired pattern, which pattern defines the via, thus forming a modified portion and a remaining portion of the surface;
providing a composition on the surface, which composition comprises a first and a second polymer and a solvent, said solvent substantially wetting the surface, whereby a first and a second sub-layer are formed under phase separation, each of said sub-layers comprising substantially one of the polymers, while the first sub-layer lies on the first electrically conducting region;
etching the first sub-layer with a first etchant; and
providing the vertical interconnect and the second electrically conducting region.
2. A method as claimed in claim 1 , characterized that the step of modifying the surface is performed by means of microcontact printing, whereby a monolayer is created.
3. A method as claimed in claim 2 , characterized in that a composition is provided after the provision of the first monolayer, which composition comprises a compound which forms a second monolayer on the remaining portion of the surface; and
the first and the second monolayer each comprise a compound provided with an end group, which end group faces away from the surface after the formation of the respective monolayer, while the end group of the compound of the second monolayer differs from the end group of the compound of the first monolayer in its polarity.
4. A method as claimed in claim 1 or 2 , characterized in that the modified portion of the surface is present on the first electrically conducting region, and in that the first sub-layer comprises the first polymer.
5. A method as claimed in claim 1 or 2 , characterized in that the surface of the intermediate layer is modified, and after etching with the first etchant the intermediate layer is patterned through etching with a second etchant.
6. A method as claimed in claim 2 or 3 , characterized in that the first electrically conducting region forms part of a metal layer, and the surface of the metal layer is modified.
7. A method as claimed in claim 6 , characterized in that the metal layer comprises gold, and the monolayer comprises a thiole.
8. A method as claimed in claim 6 or 7 , characterized in that the intermediate layer is a dielectric of a thin-film transistor whose electrodes are present in the metal layer and in an upper layer which comprises the second electrically conducting region, and
a channel layer of semiconductor material is present, in contact with the intermediate layer and with either the metal layer or the upper layer.
9. A method as claimed in claim 6 or 7 , characterized in that the electrically insulating material of the intermediate layer is a low-K material.
10. A method as claimed in claim 3 or 4 , characterized in that the monolayer present on the first electrically conducting region is removed before the second electrically conducting region is provided.