Gain adjusting and circuit arrangement
View Patent ↗The present invention relates to a method and circuit arrangement for adjusting a gain, wherein said circuit arrangement comprises at least a first output branch connected to a first load and a second output branch connected to a second load. The gain control function is realized based on a current splitting, wherein a non-operated output branch is used as a kind of dummy branch for receiving a part of the output current. Thus, only as many output branches as there are outputs are required to implement a gain control based on splitting. Thereby, a complexity of the layout design is reduced and control and biasing of dummy branches is not required.
1. A method for adjusting a gain in a circuit arrangement comprising at least a first output branch connected to a first load and a second output branch connected to a second load, said method comprising the steps of:
a) providing a first operation mode in which said first output branch is operated and said second output branch is not operated, and a second operating mode in which said first output branch is not operated and said second output branch is operated;
b) providing a switching function for switching a predetermined portion of the branch current of one of said first and second output branches to the other of said first and second output branches; and
c) adjusting said gain in at least one of said first and second operating modes by changing said predetermined portion of said branch current.
2. A method according to claim 1 , wherein said adjusting step is performed by controlling individual switching elements of said switching function, so as to determine said predetermined portion.
3. A method according to claim 2 , wherein said individual switching elements are controlled by selectively supplying a control signal to control terminals of said individual switching elements.
4. A circuit arrangement for performing a gain adjustment, said circuit arrangement comprising:
a) a first branch connected to a first load, said first branch being operated in a first operating mode of said circuit arrangement and being not operated in a second operating mode of said circuit arrangement;
b) a second branch connected to a second load said second branch being operated in said second operating mode and being not operated in said first operating mode;
c) switching means for switching a predetermined portion of the branch current of one of said first and second output branches to the other one of said first and second output branches; and
d) adjusting means for adjusting said gain by changing said predetermined portion.
5. A circuit arrangement according to claim 4 , wherein said circuit arrangement is comprised in a dual-band receiver, and wherein said first operating mode is provided to receive a first frequency band and said second operating mode is provided to receive a second frequency band.
6. A circuit arrangement according to claim 5 , wherein said first and second loads are frequency selective loads are tuned to said first and second frequency bands, respectively.
7. A circuit arrangement according to claim 5 , wherein said circuit arrangement is a low-noise amplifier.
8. A circuit arrangement according to claim 4 , wherein said switching means comprises a plurality of parallel switching element arranged to supply their switched current either to said first output branch or to said second output branch.
9. A circuit arrangement according to claim 8 , wherein said parallel switching elements are transistor means.
10. A circuit arrangement according to claim 8 , wherein said adjusting means comprises switching means for switching a control signal to said transistor means.
11. A circuit arrangement according to claim 9 , wherein said transistor means are transistor pairs.