Multi-bit time delay adjuster unit for high RF applications and method
View Patent ↗A multi-bit time-delay adjuster with Radio Frequency (RF) MicroElectroMechanical (MEM) switches may be used in MultiCarrier Power Amplifiers (MCPAs) with a feed-forward linearization technique. The multi-bit time-delay adjuster makes it possible to automatically control a time-delay match with very high precision typically required in feed-forward MCPAs. A searching process for the automatic control of time-delay match is also introduced.
1. A method for adjusting a time-delay for a high radio frequency (RF) application on the order of around 1 GHz or more using a multi-bit time-delay adjuster unit, wherein the unit has a tunable time-delay within a specified time-delay interval [0,T], and is adapted to reach a desired time-delay, the method comprising:
defining a total number of level divisions p,
defining for each level division a time-delay segment ΔT(k), where k is an integer number from 1 to p,
setting a control parameter Cp, where Cp is a measure of a relation between a present time-delay and the desired time-delay,
determining a time-delay segment sum by adding time-delay segments ΔT(k), and
repeating the setting step and the determining step until the desired time-delay is reached or the sum is within an allowed precision range Tp, and Cp is then given a predetermined value.
2. The method according to claim 1 , wherein the value of Cp depends on whether the desired time-delay is greater than, smaller than, or equal to the present time-delay.
3. The method according to claim 1 , wherein the setting-step further comprises:
controlling whether the sum is to be increased or decreased.
4. The method according to claim 1 , wherein the time-delay segments ΔT(k) are defined by the following steps:
specifying the tunable time-delay interval [0,T],
determining the number of level divisions p, and
repeatedly performing p level divisions,
wherein (p>1) and a time-delay segment ΔT(k) is further divided into n equal time-delay segments ΔT(k+1) on a lower level.
5. The method according to claim 1 , wherein the adjuster unit includes RF MicroElectroMechanical (MEM) switches.
6. The method according to claim 1 , wherein the adjuster unit includes Single-Pole Double Through (SPDT) RF MicroElectroMechanical (MEM) switches.
7. The method according to claim 1 , wherein a size of each time-delay segment ΔT(k) is T/n k , where k is an integer number from 1 to p, T denotes a length of the specified time-delay interval, and n denotes a number of time-delay segments in the time-delay interval T.
8. The method according to claim 1 , wherein a total number of level divisions depends on a number of available states of the time-delay adjuster unit.
9. The method according to claim 7 , wherein n equals four.
10. The method according to claim 1 , wherein the adjustable time-delay is adjusted for a MultiCarrier Power Amplifier (MCPA) with a feed-forward linearization technique.
11. A computer program product stored on a computer-usable medium, comprising a computer-readable program for causing a processor to control the execution of the steps in claim 1 .
12. A computer program product directly loadable into a computer usable medium, comprising the software code portions executable by a computer for performing the steps of claim 1 .
13. A multi-bit time-delay adjuster unit for high RF frequency applications adapted to tune a time-delay within a specified time-delay interval [0,T], wherein the unit comprises:
switches, and
a level divider adapted to repeatedly perform p level divisions (p>1) in order to provide time-delay segments ΔT(k) according to the method defined by claim 1 .
14. The multi-bit time-delay adjuster according to claim 13 , wherein the switches are Radio Frequency (RF) MicroElectroMechanical (MEM) switches.
15. The multi-bit time-delay adjuster according to claim 14 , wherein the RF MEM switches are Single-Pole Double Through (SPDT) RF MEM switches.
16. The multi-bit time-delay adjuster unit according to claim 13 , wherein a size of each time-delay segment ΔT(k) is T/n k , where T denotes the specified time-delay interval, n denotes a number of segments in that the time-delay interval T, k is an integer number from 1 to p, and p is a total number of level divisions.
17. The multi-bit time-delay adjuster unit according to claim 13 , wherein a total number of level divisions depends on a of the number of available states of the time-delay adjuster unit.
18. The multi-bit time-delay adjuster unit according to claim 16 , wherein n equals four.
19. The multi-bit time-delay adjuster unit according to claim 13 , wherein the time-delay is adjusted for a MultiCarrier Power Amplifier (MCPA) with a feed-forward linearization technique.
20. The method in claim 1 , wherein one or more of the time delay segments are disconnected from the adjuster unit when not needed for the desired time-delay.