Multichip module
View Patent ↗A bondwire transition arrangement for interconnecting a signal port on one IC of a multichip module with a signal port on another, adjacent, IC of the same module employs a distributed signal-transition process in which the signal on one port appears as subsignals at tapping points along a series transmission-line segment arrangement between that port and ground on the same IC and the subsignals are recombined along a second series transmission-line segment arrangement connected between the other port and ground on the other IC. Spatially corresponding tapping points are interconnected via bondwires.
1. A multi-chip module, comprising:
a) adjacently disposed first and second microwave circuits having respective first and second signal ports and respective first and second reference-potential points;
b) a first series arrangement of N transmission-line segments having N−1 sequential tapping points being connected between the first signal port and the first reference-potential point;
c) a second series arrangement of transmission-line segments having N−1 sequential tapping points being connected between the second signal port and the second reference-potential point;
d) the first series arrangement having a signal-port end which corresponds spatially to a reference-potential end of the second series arrangement;
e) the second series arrangement having a signal-port end which corresponds spatially to a reference-potential end of the first series arrangement; and
f) likewise spatially corresponding pairs of tapping points being directly connected together by way of respective bond wires.
2. The multi-chip module as claimed in claim 1 , wherein, for at least one of the first and second series arrangements, a transmission-line segment nearest to at least one of the signal ports is a bend.
3. The multi-chip module as claimed in claim 1 , wherein the first and second series arrangements are open-circuited.
4. The multi-chip module as claimed in claim 3 , wherein, for at least one of the first and second series arrangements, an open-circuit capacitance is provided at the reference-potential end of said at least one arrangement.
5. The multi-chip module as claimed in claim 1 , wherein the microwave circuits are monolithic microwave integrated circuits (MMICs).
6. The multi-chip module as claimed in claim 1 , wherein the microwave circuits are microstripline integrated circuits (MICS).
7. A method of interfacing a signal on a first signal port of one integrated circuit (IC) of a multi-chip module with a second signal port of another, adjacent, IC of the same multi-chip module, comprising the steps of:
a) decomposing the signal into a plurality of subsignals in a first transmission-line arrangement;
b) feeding the subsignals from the first transmission-line arrangement directly via bondwires to a second transmission-line arrangement; and
c) recombining in the second transmission-line arrangement the thus fed subsignals into a combined signal at the second signal port.