Self-scanning light-emitting element array chip
View Patent ↗Provided is a self-scanning light-emitting element array chip structured on a substrate using Si. A lattice mismatching buffer layer ( 32 ) is formed on a Si substrate ( 30 ). On the lattice mismatching buffer layer ( 32 ), successively stacked are an n-type AlGaAs layer ( 14 ), a p-type AlGaAs layer ( 16 ), an n-type AlGaAs layer ( 18 ), and a p-type AlGaAs layer ( 20 ) in this order. On the AlGaAs layer ( 20 ) provided is an anode electrode ( 22 ), on the AlGaAs layer ( 18 ) a gate electrode ( 24 ), on the bottom surface of the GaAs substrate a cathode electrode ( 26 ).
1. A self-scanning light-emitting element array chip, comprising:
a Si substrate;
a lattice mismatching buffer layer formed directly on the Si substrate, the buffer layer including a strained-layer super lattice; and
a self-scanning light-emitting element array including pnpn layers formed on the lattice mismatching buffer layer.
2. The self-scanning light-emitting element array chip according to claim 1 , further comprising:
a driver circuit formed an the Si substrate.
3. The self-scanning light-emitting element array chip according to claim 1 or 2 , wherein the width of the chip is in a range of 0.03 mm-0.3 mm.
4. The self-scanning light-emitting element array chip according to claim 3 , wherein the width of the chip is in a range of 0.05 mm-0.2 mm.
5. The self-scanning light-emitting element array chip according to claim 3 , wherein the length of the chip is in a range of 2 mm-100 mm.
6. The self-scanning light-emitting element array chip according to claim 5 , wherein the length of the chip is in a range of 5 mm-20 mm.
7. The self-scanning light-emitting element array chip according to claim 5 , wherein the height of the chip is smaller than the width thereof.
8. The self-scanning light-emitting element array chip according to claim 1 or 2 , wherein the pnpn layers include III-V compound semiconductor consisting of B, Al, Ga or In for III group element and N, P, As or Sb for V group element.
9. The self-scanning light-emitting element array chip according to claim 1 or 2 , wherein the pnpn layers Include II-VI compound semiconductor consisting of Zn or Cd for II group element and O, S, Se or Te for VI group element.
10. An optical writing heed, comprising:
a self-scanning light-emitting element array structured by arranging the self-scanning light-emitting element array chips of claim 1 or 2 , and
a lens array for projecting light from the self-scanning light-emitting element array.
11. An optical printer comprising:
an optical writing head of claim 10 ; and
a photosensitive drum onto which light from the self-scanning light-emitting element array is projected.