IP Library Granted Patent US 7,046,049
Granted Patent B2
US 7,046,049 · App. 10/501,292 · Granted May 16, 2006

Driver circuit for controlling a resonant converter

Assignee: Koninklijke Philips Electronics N.V.
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Quick Facts
Patent No.
US 7,046,049
App. No.
10/501,292
Granted
May 16, 2006
Kind
B2
Abstract

In order to improve the efficiency of a driver circuit for controlling upper and lower switching means (T 3 , T 4 ) for converting a direct voltage Ud into a clocked output voltage Ua for a resonant converter with a high-voltage section (HT) for controlling the upper switching means (T 3 ) and a low-voltage section (NT) for controlling the lower switching means (T 4 ), which switch the switching means (T 3 , T 4 ) on alternately to one another, the switch-on phases of the switching means (T 3 , T 4 ) being separated from one another by dead-time phases, there is provided a first circuit section which controls the duty cycle Δtein 3 of the upper switching means (T 3 ) as a function of the duty cycle Δtein 4 of the lower switching means (T 4 ), and receives control signals from the low-voltage section (NT) exclusively during the duty cycle Δtein 4 of the lower switching means (T 4 ).

Claims (12)

1. A driver circuit for controlling upper and lower switching means for converting a direct voltage into a clocked output voltage for a resonant converter with a high-voltage section for controlling the upper switching means and a low-voltage section for controlling the lower switching means which switch the switching means on alternately, the switch-on phases of the switching means being separated from one another by dead-time phases, characterized in that there is provided a first circuit section which controls the duty cycle of the upper switching means as a function of the duty cycle of the lower switching means and receives control signals from the low-voltage section exclusively during the duty cycle of the lower switching means.

2. A driver circuit as claimed in claim 1 , characterized in that the first circuit section is equipped with at least one first integrating circuit configuration which is charged during the duty cycle of the lower switching means and discharged during the duty cycle of the upper switching means.

3. A circuit as claimed in claim 2 , characterized in that the first integrating circuit configuration is equipped with at least one integration capacitor and a charging circuit and a discharging circuit.

4. A driver circuit as claimed in claim 3 , characterized in that the charging circuit and the discharging circuit are both equipped with a respective constant-curtent source.

5. A driver circuit as claimed in claim 2 , characterized by a transistor provided in the low-voltage section which transmits a signal to the high-voltage section for the duration of the switch-on of the lower switching means.

6. A driver circuit as claimed in claim 1 , characterized by a second circuit section which determines switch-on instant of the upper switching means as a function of the voltage characteristic of the output voltage.

7. A driver circuit as claimed in claim 6 , characterized in that the second circuit section is equipped with a voltage-increase recognition circuit with at least one capacitor, one resistor and one comparator in particular a Schmitt trigger.

8. A driver circuit as claimed in claim 1 , characterized by a second circuit section with means witch control the duration of the first dead-time phase before the switch-on of the upper switching means as a function of the duration of the second dead-time phase before the switch-on of the lower switching means or by a timer connected to the low-voltage section.

9. A driver circuit as claimed in claim 8 , characterized in that the second circuit section is equipped with at least one second integrating circuit configuration which is charged for the duration ΔT tot2 the second dead-time phase, or for the duration of a signal form the external timer, and discharged for the duration of the first dead-time phase.

10. A driver circuit as claimed in claim 9 , characterized in that the structure of the second integrating circuit configuration corresponds to the structure of the first integrating circuit configuration.

11. A driver circuit as claimed in claim 1 , characterized by a voltage-decrease recognition circuit with at least one capacitor, one resistor and one comparator especially a Schmitt trigger, for determining the switch-on instant t ein4 for the lower switching means.

12. A resonant converter with a driver circuit for controlling upper and lower switching means for converting a direct voltage into a clocked output voltage for the resonant converter with a high-voltage section for controlling the upper switching means and a low-voltage section for contralling the lower switching means which switch the switching means on alternately, the switch-on phases of the switching means being separated from one another by dead-time phases, characterized by a first circuit section, which controls the duty cycle of the upper switching means as a function of the duty-cycle of the lower switching means and receives control signals from the low-voltage section exclusively during the duty cycle of the lower switching means.

Assignments (5)
CHANGE OF NAME Recorded Feb 2, 2016
From: ST WIRELESS SA
To: ST-ERICSSON SA
Reel/Frame 037683/0128 →
STATUS CHANGE-ENTITY IN LIQUIDATION Recorded Feb 2, 2016
From: ST-ERICSSON SA
To: ST-ERICSSON SA, EN LIQUIDATION
Reel/Frame 037739/0493 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2016
From: NXP B.V.
To: ST WIRELESS SA
Reel/Frame 037624/0831 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2006
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: NXP B.V.
Reel/Frame 018635/0787 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 12, 2004
From: DEPPE, CARSTEN
To: KONINKLIJKE PHILIPS ELECTRONICS N.V.
Reel/Frame 016266/0183 →
Priority Claims (1)
DE 102 00 917 · Jan 12, 2002 · national
Continuity (1)
Related Publication 20050116748A1 · Jun 2, 2005