Output circuit for a semiconductor amplifier element

1. An output circuit for a semiconductor amplifier element having an output capacitance ( 20 , 42 ) that is to be cancelled out by a first LC circuit having a first inductance ( 22 , 44 ) and a first capacitance ( 24 , 46 ), said output circuit comprising an additional inductance circuit comprising an additional inductance ( 30 , 52 ) and an additional capacitance ( 32 , 54 ), said first inductance circuit and said additional inductance circuit compensating for the output capacitance ( 20 , 42 ) of the semiconductor amplifier element, while the first inductance ( 22 , 44 ) and the first capacitance ( 24 , 46 ) suppress the second harmonics within the output signal of the semiconductor amplifier element, wherein the additional inductance is connected to a node between the first inductance and the first capacitance.

2. An output circuit as claimed in claim 1 , in which the first inductance ( 22 , 44 ) is connected to the output of the semiconductor amplifier element and the first capacitance ( 24 , 46 ) is connected between the first inductance ( 22 , 44 ) and ground, wherein the additional inductance ( 30 ) is connected to a node between the first inductance ( 22 , 44 ) and the first capacitance ( 24 , 46 ) and to the additional capacitance ( 32 ) which is connected to ground.

3. An output circuit as claimed in claim 2 , wherein a power supply is connected to a node between the second inductance ( 30 ) and the second capacitance ( 32 ).

4. An output circuit as claimed in claim 1 , comprising a further LC circuit connected between the second inductance ( 30 , 52 ) and the second capacitance ( 32 , 54 ), said further LC circuit comprising a third inductance ( 56 ) and a third capacitance ( 58 ), wherein the third inductance ( 56 ) is connected to a node between the second inductance ( 52 ) and the second capacitance ( 54 ) and the third capacitance ( 58 ) which is connected to ground.

5. An output circuit as claimed in claim 2 , wherein a power supply is connected to a node ( 57 ) between the third inductance ( 56 ) and the third capacitance ( 58 ).

6. An output circuit as claimed in claim 1 , wherein the first inductance ( 22 , 44 ) and the first capacitance ( 24 , 46 ) form a series resonator.

7. An output circuit as claimed in claim 1 , wherein said capacitances are fanned by combinations of insulating layers ( 110 , 114 ) and conductive layers ( 108 , 112 ) on a substrate ( 106 ) on which said output circuit is formed.

8. An output circuit as claimed in claim 1 , wherein the inductances are formed by one or more inductively coupled bond wires ( 98 , 100 , 102 ).

9. An output circuit as claimed in claim 1 , wherein said semiconductor amplifier element is a transistor.

10. An output circuit as claimed in claim 1 , wherein the LC circuits are built-in shunt LC circuits.