Clock control of transmission-signal processing devices in mobile radio terminal devices
View Patent ↗To support a plurality of different mobile radio standards in mobile radio terminal devices using a single system oscillator, a sampling rate converter converts the sampling rates from an input rate to an output rate and additionally outputs control information which is suitable for operating signal processing components. The components receiving the control information are arranged in the signal flow upstream of the sampling rate converter, on average exactly at a virtual sampling frequency. The virtual sampling pattern is mapped onto the frame of the physical operating clock by simply gating out edges of the physical operating clock. Using the control signal, a clock control device generates a masked clock that has, on average, an edge repetition rate which corresponds to the virtual sampling frequency of the samples or to an integer multiple thereof.
1. An apparatus for clock control in transmission-signal processing devices in mobile radio terminal devices which is compatible with a plurality of different mobile radio standards, comprising:
a sampling rate converter, a digital/analog converter and a clock control device, wherein the sampling rate converter converts samples provided in a virtual time frame corresponding to a virtual sampling frequency into samples of a physical sampling pattern or an integer fraction thereof for input into the digital/analog converter, and
wherein the sampling rate converter outputs a control signal which the clock control device uses to generate a signal which, on average, has an edge repetition rate which corresponds to the virtual sampling frequency or an integer multiple of the virtual sampling frequency, and
wherein the signal generated by using the control signal is formed in the clock control device by gating out edges from a physical operating clock, and wherein the signal formed in the clock control device is configured to control a number of operating clock cycles per unit time to dictate a speed in which modulation data is read from a memory.
2. The apparatus as claimed in claim 1 , comprising a system clock source comprising a single system clock oscillator.
3. The apparatus as claimed in claim 2 , wherein the system clock source supplies the physical operating clock for signal processing components associated with the apparatus, and also a physical sampling clock for the digital/analog converter.
4. The apparatus as claimed in claim 3 , wherein the physical operating clock is identical to the physical sampling clock.
5. The apparatus as claimed in claim 3 , wherein the physical operating clock comprises an integer multiple of the physical sampling clock.
6. The apparatus as claimed in claim 3 , wherein the physical operating clock is derived from a GSM/EDGE-typical system frequency of 13 MHz, wherein the physical operating clock frequency is 65 MHz=5×13 MHz or 62.4 MHz=192/40×13 MHz.
7. The apparatus as claimed in claim 1 , wherein the signal generated using the control signal in the clock control device is derived from the physical operating clock and has synchronous edges with respect thereto.
8. The apparatus as claimed in claim 1 , wherein the signal generated using the control signal in the clock control is used as an operating clock for circuit components arranged upstream of the sampling rate converter.
9. The apparatus as claimed in claim 1 ,
wherein a conversion ratio of the sampling rate converter is alterable or programmable.
10. The apparatus as claimed in claim 1 , wherein the mobile radio standards comprise the UMTS and GSM/EDGE standards.
11. The apparatus as claimed in claim 1 , wherein a conversion ratio of the sampling rate converter is 64/65 or 1.536/1.625 from an input rate to an output rate.
12. The apparatus as claimed in claim 3 , wherein a time frame of the physical sampling clock in the digital/analog converter or the time frame of a system clock or the time frame of the physical operating clock is chosen independently of a sampling pattern for the standard-specific digital signal processing.
13. An apparatus for clock control in transmission-signal processing devices in mobile radio terminal devices which is compatible with a plurality of different mobile radio standards, comprising:
a sampling rate converter, a digital/analog converter and a clock control device, wherein the sampling rate converter converts samples provided in a virtual time frame corresponding to a virtual sampling frequency into samples of a physical sampling pattern or an integer fraction thereof for input into the digital/analog converter, and
wherein the sampling rate converter outputs a control signal which the clock control device uses to generate a signal which, on average, has an edge repetition rate which corresponds to the virtual sampling frequency or an integer multiple of the virtual sampling frequency, and
wherein the signal generated by using the control signal is formed in the clock control device by gating out edges from a physical operating clock,
wherein the signal generated using the control signal in the clock control device is derived from the physical operating clock and has synchronous edges with respect thereto, and
wherein the output signal from the clock control device is generated by gating out edges from the physical operating clock by logic ANDing of the physical operating clock and the control signal.
14. An apparatus for clock control in transmission-signal processing devices in mobile radio terminal devices which is compatible with a plurality of different mobile radio standards, comprising:
a sampling rate converter, a digital/analog converter and a clock control device, wherein the sampling rate converter converts samples provided in a virtual time frame corresponding to a virtual sampling frequency into samples of a physical sampling pattern or an integer fraction thereof for input into the digital/analog converter, and
wherein the sampling rate converter outputs a control signal which the clock control device uses to generate a signal which, on average, has an edge repetition rate which corresponds to the virtual sampling frequency or an integer multiple of the virtual sampling frequency, and
wherein the signal generated by using the control signal is formed in the clock control device by gating out edges from a physical operating clock,
wherein a control signal flow determining data throughput is in an opposite direction to a flow of data, wherein the sampling clock associated with the digital/analog converter and a conversion ratio of the sampling rate converter determine a data throughput of a transmission path.
15. An apparatus for clock control in transmission-signal processing devices in mobile radio terminal devices which is compatible with a plurality of different mobile radio standards, comprising:
a sampling rate converter, a digital/analog converter and a clock control device, wherein the sampling rate converter converts samples provided in a virtual time frame corresponding to a virtual sampling frequency into samples of a physical sampling pattern or an integer fraction thereof for input into the digital/analog converter, and
wherein the sampling rate converter outputs a control signal which the clock control device uses to generate a signal which, on average, has an edge repetition rate which corresponds to the virtual sampling frequency or an integer multiple of the virtual sampling frequency, and
wherein the signal generated by using the control signal is formed in the clock control device by gating out edges from a physical operating clock,
wherein the sampling rate converter and the digital/analog converter have an interpolator interposed therebetween with an integer interpolation factor associated therewith.
16. The apparatus as claimed in claim 15 , wherein the interpolation factor is identical to a multiplex factor which is used to operate circuit components associated with the sampling rate converter and of the devices arranged upstream thereof.
17. A method for clock control in transmission-signal processing devices in mobile radio terminal devices which is compatible with a plurality of different mobile radio standards, comprising:
generating a control signal from a sampling rate converter, the control signal being used to generate a clock signal which, on average, has an edge repetition rate which corresponds to a virtual sampling frequency;
wherein generating the clock signal comprises gating out edges from a physical operating clock;
converting samples provided in a virtual time frame into samples of a physical sampling pattern for digital/analog conversion; and
using the clock signal to control a number of operating clock cycles per unit time to dictate a speed in which modulation data is read from a memory.
18. The method as claimed in claim 17 , further comprising generating a system clock with a system clock source comprising a single system clock oscillator.
19. The method as claimed in claim 18 , further comprising supplying a physical operating clock for signal processing components and also a physical sampling clock for the digital/analog conversion.
20. The method as claimed in claim 19 , wherein the physical operating clock is identical to the physical sampling clock.
21. The method as claimed in claim 19 , wherein the physical operating clock is an integer multiple of the physical sampling clock.
22. A method for clock control in transmission-signal processing devices in mobile radio terminal devices which is compatible with a plurality of different mobile radio standards, comprising:
generating a control signal from a sampling rate converter, the control signal being used to generate a clock signal which, on average, has an edge repetition rate which corresponds to a virtual sampling frequency;
wherein generating the clock signal comprises gating out edges from a physical operating clock, and wherein generating the clock signal using the control signal comprises deriving the clock signal from the physical operating clock; and
converting samples provided in a virtual time frame into samples of a physical sampling pattern for digital/analog conversion,
wherein generating the clock signal comprises logic ANDing of the physical operating clock and of the control signal.
23. The method as claimed in claim 17 , further comprising using the clock signal as an operating clock for circuit components which are arranged upstream of a sampling rate converter used for converting the samples.
24. The method as claimed in claim 17 , wherein a conversion ratio for a sampling rate conversion is alterable or programmable.
25. The method as claimed in claim 17 , wherein the method is applied for a combination of the UMTS and GSM/EDGE standards.
26. The method as claimed in claim 17 , wherein a conversion ratio for the sampling rate conversion is 64/65 or 1.536/1.625 from an input rate to an output rate.
27. A method for clock control in transmission-signal processing devices in mobile radio terminal devices which is compatible with a plurality of different mobile radio standards, comprising:
generating a control signal from a sampling rate converter, the control signal being used to generate a clock signal which, on average, has an edge repetition rate which corresponds to a virtual sampling frequency;
wherein generating the clock signal comprises gating out edges from a physical operating clock; and
converting samples provided in a virtual time frame into samples of a physical sampling pattern for digital/analog conversion;
generating a system clock with a system clock source comprising a single system clock oscillator; and
supplying a physical operating clock for signal processing components and also a physical sampling clock for the digital/analog conversion,
wherein a time frame of the supplied physical sampling clock for the digital/analog conversion or a time frame of the system clock or a time frame of the supplied physical operating clock is independent of a sampling pattern for the standard-specific digital signal processing.
28. The method as claimed in claim 22 , wherein generating the clock signal comprises logic ANDing of the physical operating clock and of the control signal.
29. A method for clock control in transmission-signal processing devices in mobile radio terminal devices which is compatible with a plurality of different mobile radio standards, comprising:
generating a control signal from a sampling rate converter, the control signal being used to generate a clock signal which, on average, has an edge repetition rate which corresponds to a virtual sampling frequency;
wherein generating the clock signal comprises gating out edges from a physical operating clock; and
converting samples provided in a virtual time frame into samples of a physical sampling pattern for digital/analog conversion,
wherein a control signal flow determining a data throughput is in an opposite direction to a signal flow, wherein the sampling clock for the digital/analog conversion and a conversion ratio for a sampling rate conversion determine the data throughput of a transmission path.
30. A method for clock control in transmission-signal processing devices in mobile radio terminal devices which is compatible with a plurality of different mobile radio standards, comprising:
generating a control signal from a sampling rate converter, the control signal being used to generate a clock signal which, on average, has an edge repetition rate which corresponds to a virtual sampling frequency;
wherein generating the clock signal comprises gating out edges from a physical operating clock;
converting samples provided in a virtual time frame into samples of a physical sampling pattern for digital/analog conversion; and
interpolating using an integer interpolation factor between a conversion of a sampling rate using a sampling rate converter and a sampling rate of the digital/analog conversion.
31. The method as claimed in claim 30 , wherein an interpolation factor of the interpolation is identical to a multiplex factor which is used to operate circuit components for sampling rate conversion and devices arranged upstream thereof.
32. An apparatus for clock control in transmission-signal processing devices in mobile radio terminal devices which is compatible with a plurality of different mobile radio standards, comprising:
a sampling rate converter, a digital/analog converter, a modulator and a clock control device, wherein
the sampling rate converter converts samples provided in a virtual time frame corresponding to a virtual sampling frequency into samples of a physical sampling pattern or an integer fraction thereof for input into the digital/analog converter, and wherein
the sampling rate converter outputs a control signal which the clock control device uses to generate a signal which, on average, has an edge repetition rate which corresponds to the virtual sampling frequency or an integer multiple of the virtual sampling frequency, and
wherein the signal generated by using the control signal is output to the modulator and
wherein the signal formed in the clock control device is configured to control a number of operating clock cycles per unit time to dictate a speed in which modulation data is read from a memory.
33. An apparatus for clock control in transmission-signal processing devices in mobile radio terminal devices which is compatible with a plurality of different mobile radio standards, comprising:
a sampling rate converter, a digital/analog converter, a modulator and a clock control device, wherein
the sampling rate converter converts samples provided in a virtual time frame corresponding to a virtual sampling frequency into samples of a physical sampling pattern or an integer fraction thereof for input into the digital/analog converter, and wherein
the sampling rate converter outputs a control signal which the clock control device uses to generate a signal which, on average, has an edge repetition rate which corresponds to the virtual sampling frequency or an integer multiple of the virtual sampling frequency,
wherein the sampling rate converter deactivates the control signal when a further output value needs to be calculated without a new input value being provided, and
wherein the signal formed in the clock control device is configured to control a number of operating clock cycles per unit time to dictate a speed in which modulation data is read from a memory.
34. An apparatus for clock control in transmission-signal processing devices in mobile radio terminal devices which is compatible with a plurality of different mobile radio standards, comprising:
a sampling rate converter, a digital/analog converter, a modulator and a clock control device, wherein
the sampling rate converter converts samples provided in a virtual time frame corresponding to a virtual sampling frequency into samples of a physical sampling pattern or an integer fraction thereof for input into the digital/analog converter, and
wherein the sampling rate converter outputs a control signal which the clock control device uses to generate a signal which, on average, has an edge repetition rate which corresponds to the virtual sampling frequency or an integer multiple of the virtual sampling frequency,
wherein the sampling rate converter deactivates the control signal after it establishes that it is necessary to calculate a further output value and there is no pattern element in the virtual sampling pattern situated between two successive clock cycles of the physical sampling pattern and
wherein the signal formed in the clock control device is configured to control a number of operating clock cycles per unit time to dictate a speed in which modulation data is read from a memory.
35. An apparatus for clock control in transmission-signal processing devices in mobile radio terminal devices which is compatible with a plurality of different mobile radio standards, comprising:
a sampling rate converter configured to convert samples provided in a virtual time frame corresponding to a virtual sampling frequency into samples of a physical sampling pattern or an integer fraction thereof, and further configured to output a control signal;
a digital/analog converter configured to receive the samples of the physical sampling pattern or the integer fraction thereof; and
a clock control device configured to generate a signal by using the control signal and by gating out edges from a physical operating clock, wherein the signal, on average, has an edge repetition rate which corresponds to the virtual sampling frequency or an integer multiple of the virtual sampling frequency and wherein the signal formed in the clock control device is configured to control a number of operating clock cycles per unit time to dictate a speed in which modulation data is read from a memory.