IP Library Granted Patent US 7,360,077
Granted Patent B2
US 7,360,077 · App. 10/507,866 · Granted Apr 15, 2008

Production line boot sector lock

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Quick Facts
Patent No.
US 7,360,077
App. No.
10/507,866
Granted
Apr 15, 2008
Kind
B2
Abstract

Hacking of a class of Set-Top Boxes known as Integrated Receiver-Decoders (IRDs) used to receive satellite broadcasts for display on television sets is prevented by use of connections to the reprogramming enable pin of a flash memory. If a user attempts to reprogram the boot sector of the flash memory in order to obtain free service via privacy, the set-top box is destroyed. The invention relates to the design and manufacture of IRDs that are resistant to hacking via unauthorized reprogramming.

Claims (33)

1. A set top box for receiving television broadcast signals and decoding selected signals for display on a television set including a circuit board, comprising:

a microprocessor having a reset line;

a reset circuit having a reset line for generating a reset signal;

a programmable memory for storing executable code, the programmable memory having a programming enable pin for reprogramming the programmable memory;

means for connecting the programming enable pin to the reset line of the microprocessor and the reset line of the reset circuit;

wherein the microprocessor and the reset circuit are damaged upon application of a programming voltage to the programming enable pin in an attempt to reprogram the flash memory.

2. The set top box of claim 1 wherein the connecting means comprises a resistor or jumper.

3. The set top box of claim 2 wherein the resistor or jumper has a value sufficiently low so that when programming voltage is applied to the programming enable pin, damage is caused to the microprocessor.

4. The set top box of claim 2 wherein the resistor or jumper has a resistance of less than 100 ohms at 0.25 watts.

5. The set top box of claim 4 wherein the programming voltage is 12 volts.

6. The set top box of claim 1 wherein the programmable memory is a flash memory.

7. The set top box of claim 1 adapted to function as an integrated receiver decoder for reception of satellite broadcast from a broadcast seivice provider and decoding television programs for display on a television set, adapted to display only television programs authorized by a satellite broadcast provider.

8. The set top box of claim 1 wherein the programming enable pin is coupled to ground through a second resistor.

9. The set top box of claim 8 wherein the second resistor has a resistance of over 4 kilo ohms at 0.1 watts.

10. The set top box of claim 1 , wherein the programmable memory has a boot sector, and the executable code is saved in the boot sector.

11. A method of preventing unauthorized reprogramming of a set top box after manufacture, the set top box comprising a programmable flash memory having a programming enable pin, a microprocessor having a reset line, and a reset circuit having a reset line, the method comprising

(a) installing the programmable flash memory on a circuit board:

(b) applying a programming voltage to the programming enable pin;

(c) programming the programmable memory;

(d) connecting the programming enable pin to the reset lines;

wherein upon applying a programming voltage to the programming enable pin in an attempt to reprogram the flash memory, the microprocessor is damaged; and

(e) soldering the circuit board.

12. The method of claim 11 , wherein step (d) also includes installing a resistor or a jumper between the programming enable pin and the reset lines.

13. The method of claim 11 , wherein step (a), comprises the steps of:

(a1) applying solder paste to a circuit board;

(a2) placing the microprocessor, the programmable memory, and the reset circuit on the circuit board; and

(a3) reflowing the solder paste.

14. The method of claim 13 , further comprising, after step (d), the step of:

(f) inserting a resistor or a jumper to connect the programming enable pin of the flash memory, the reset line of the reset circuit, and the reset line of the microprocessor.

15. The method of claim 14 further comprising the step of placing a hardware component on top of the resistor or jumper, thereby inhibiting access to the resistor or jumper after the circuit board is manufactured.

16. The method of claim 15 wherein the hardware component is a smart card connector.

17. The method of claim 14 further including the step of validating code after programming the programmable memory.

18. The method of claim 14 wherein the programmable memory is a flash memory having a boot sector.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME FROM INTERDIGITAL CE PATENT HOLDINGS TO INTERDIGITAL CE PATENT HOLDINGS, SAS. PREVIOUSLY RECORDED AT REEL: 47332 FRAME: 511. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Feb 28, 2024
From: THOMSON LICENSING
To: INTERDIGITAL CE PATENT HOLDINGS, SAS
Reel/Frame 066703/0509 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 26, 2018
From: THOMSON LICENSING
To: INTERDIGITAL CE PATENT HOLDINGS
Reel/Frame 047332/0511 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2008
From: THOMSON LICENSING S.A.
To: THOMSON LICENSING
Reel/Frame 020583/0539 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 16, 2004
From: PITSCH, ROBERT ALAN; CURTIS, III, JOHN JOSEPH
To: THOMSON LICENSING S.A.
Reel/Frame 016233/0726 →