IP Library Granted Patent US 7,116,177
Granted Patent B2
US 7,116,177 · App. 10/515,689 · Granted Oct 3, 2006

PLL circuit leakage compensation circuit for generating a leakage compensation signal

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Quick Facts
Patent No.
US 7,116,177
App. No.
10/515,689
Granted
Oct 3, 2006
Kind
B2
Abstract

A PLL circuit with a series coupling of a charge pump, a loop filter and a voltage-controlled oscillator generating an output frequency (f), the voltage-controlled oscillator including tunable devices controlled by a first control signal generated by the loop filter, the PLL circuit includes a leakage compensation circuit for generating a leakage compensation signal to modify a control of the voltage-controlled oscillator, the leakage compensation signal being indicative for a leakage current in the tunable devices of the voltage-controlled oscillator.

Claims (5)

1. A PLL circuit comprising a series coupling of a charge pump, a loop filter and a voltage-controlled oscillator generating an output frequency, said voltage-controlled oscillator comprising tunable devices controlled by a first control signal generated by the loop filter, the PLL circuit being characterized in that it further comprises a leakage compensation circuit for generating a leakage compensation signal to modify a control of the voltage-controlled oscillator, the leakage compensation signal being indicative for a leakage current in the tunable devices of the voltage-controlled oscillator and further comprises an adder for adding the leakage compensation signal to a second output signal generated by the loop filter, said adder generating a second control signal for the voltage-controlled oscillator.

2. A PLL circuit as claimed in claim 1 wherein the loop filter is a third order lead-lag RC filter.

3. A PLL circuit as claimed in claim 1 wherein the VCO comprises a plurality of voltage controlled oscillators, each of the voltage controlled oscillators including a LC tank circuit, each of them comprising an inductor connected in parallel to a first pair of controllable capacitors and to a second pair of controllable capacitors, said pairs of controllable capacitors being controlled by the first control signal and the second control signal, respectively.

4. A PLL circuit as claimed in claim 3 , wherein the first pair of controllable capacitors and the second pair of controllable capacitors are varicap diodes having a first area and respectively a second area.

5. A PLL circuit as claimed in claim 4 , wherein the leakage compensation signal is generated by a current generator comprising a third pair of controllable capacitors having an area substantially proportional to a sum of the first area and the second area.

Assignments (5)
CHANGE OF NAME Recorded Feb 2, 2016
From: ST WIRELESS SA
To: ST-ERICSSON SA
Reel/Frame 037683/0128 →
STATUS CHANGE-ENTITY IN LIQUIDATION Recorded Feb 2, 2016
From: ST-ERICSSON SA
To: ST-ERICSSON SA, EN LIQUIDATION
Reel/Frame 037739/0493 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2016
From: NXP B.V.
To: ST WIRELESS SA
Reel/Frame 037624/0831 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2006
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: NXP B.V.
Reel/Frame 018635/0787 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 24, 2004
From: BREKELMANS, JOHANNES HUBERTUS ANTONIUS; CRAND, OLIVIER
To: KONINKLIJKE PHILIPS ELECTRONICS N.V.
Reel/Frame 016529/0584 →