Source-to-source partitioning compilation
A method is disclosed for partitioning a specification in a source code. In a first step, the specification is converted into a plurality of abstract syntax trees. In a second step, the plurality of abstract syntax trees is partitioned into at least a first set and a second set. The first set of abstract syntax trees is to be implemented by a first processor and the second set of abstract syntax trees is to be implemented by a second processor. The first and second set of abstracts syntax trees are translated to a specification in the original source code language, respectively, allowing the user to add manual changes to the specifications. Furthermore, specific compiler and design tools are used to convert the specifications into corresponding executable machine code and a specification of the co-processor.
1. A method for partitioning a specification in a source code; characterized in that the method comprises the following steps:
first converting the specification into a plurality of abstract syntax trees;
partitioning the plurality of abstract syntax trees into at least a first set and a second set of abstract syntax trees, wherein the step of partitioning comprises a step of out-lining at least one abstract syntax tree of the first set of abstract syntax trees based on profile data as input data and replacing said abstract syntax tree by a function call to a function present as an abstract syntax tree in the second set of abstract syntax trees;
implementing the first set of abstract syntax trees by a first processor and implementing the second set of abstract syntax trees by a second processor;
defining an interface between the first processor and the second processor, wherein the interface comprises a remote function call, the remote function call having a set of parameters, the set of parameters comprising an identifier for the function to be called, at least one reference pointing to the input data of the function to be called, at least one reference pointing to the result data of the function to be called, and a reference pointing to a memory location used for storing information on the return status of the function to be called; and
second converting, after the partitioning step, the first set of abstract syntax trees and the second set of abstract syntax trees back to source code, thereby facilitating editing of a resulting specification in the source code, wherein the second converting step comprises converting the first set of abstract syntax trees to a first partial specification in the source code and converting the second set of abstract syntax trees to a second partial specification in the source code.
2. A method for partitioning a specification in a source code according to claim 1 , wherein the second processor is a co-processor.
3. A method for partitioning a specification in a source code according to claim 2 , wherein the first processor is a general-purpose processor.
4. A method for partitioning a specification in a source code according to claim 1 wherein the step of partitioning the abstract syntax trees into a first set of abstract syntax trees and a second set of abstract syntax trees comprises a step of out-lining at least one abstract syntax tree of the first set of abstract syntax trees based on programmer provided information and replacing said abstract syntax tree by a function call to a function present as an abstract syntax tree in the second set of abstract syntax trees.
5. A co-design method for producing a target system wherein the target system comprises a first processor and at least a second processor;
the co-design method comprising the method for partitioning a specification in a source code according to claim 1 .
6. A co-design method for producing at target system according to claim 5 , wherein the second converting step of the method for partitioning a specification in a source code comprises converting the first set of abstract syntax trees to a first partial specification in the source code and converting the second set of abstract syntax trees to a second partial specification in the source code.
7. A co-design method for producing a target system according to claim 6 wherein the second processor is a co-processor and wherein the second partial specification is converted to a specification of the co-processor.
8. A co-design method for producing a target system according to claim 7 , wherein the first processor is a general-purpose processor and wherein the first partial specification is converted to object code by means of a compiler.
9. A co-design method for producing a target system according to claim 8 , further comprising a step for defining an interface between the general-purpose processor and the co-processor.
10. A co-design method according to claim 7 , wherein the specification of the co-processor comprises a specification of an ASIC.
11. A co-design method according to claim 7 , wherein the specification of the co-processor comprises a specification of a programmable processor.
12. A co-design method according to claim 7 , wherein the specification of the co-processor comprises a specification of a reconfigurable processor.
13. A co-design method according to claim 9 , wherein the interface between the general-purpose processor and the co-processor comprises a remote function call;
the remote function call having a set of parameters;
the set of parameters comprising an identifier for the function to be called, at least one reference pointing to the input data of the function to be called and at least one reference pointing to the result data of the function to be called.
14. A co-design method according to claim 13 wherein the set of parameters of the remote function call further comprises a reference to a memory location used for storing information on the return status of the function to be called.
15. A co-design method according to claim 5 wherein the target system further comprises a system memory and a system bus;
the system memory, the first processor and the second processor being coupled by the system bus.
16. A co-design method according to claim 8 wherein the general-purpose processor is a digital signal processor.