IP Library Granted Patent US 7,102,386
Granted Patent B2
US 7,102,386 · App. 10/525,490 · Granted Sep 5, 2006

Reconfigurable electronic device having interconnected data storage devices

Assignee: Koninklijke Philips Electronics, N.V.
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Quick Facts
Patent No.
US 7,102,386
App. No.
10/525,490
Granted
Sep 5, 2006
Kind
B2
Abstract

A reconfigurable electronic device ( 100 ), e.g., a field programmable gate array (FPGA) or another type of complex programmable logic device (CPLD), has a first data storage device ( 120 ) and a second storage device ( 220 ) that are interconnected in a dual port memory mode of the reconfigurable electronic device ( 100 ). In this mode, the first data storage device ( 120 ) is accessible by a first decoder ( 140 ) both in a read as well as in a write mode, and the second data storage device ( 120 ) is accessible by a second decoder ( 140 ) in a read mode, thus providing an efficient dual port memory implementation. In a preferred embodiment, the first data storage device ( 120 ) is coupled to the second data storage device ( 220 ) via a configurable data copy circuit ( 160 ) that is responsive to a configuration signal provided via a configuration signal input ( 170 ), thus allowing for a very area efficient implementation of a dual port memory for reconfigurable electronic device ( 100 ).

Claims (13)

1. A reconfigurable electronic device, comprising:

a first data storage device being responsive to a control signal;

a second data storage device being responsive to a further control signal, the second data storage device being coupled to the first data storage device for receiving a data copy from the first data storage device;

a first address decoder coupled to the first data storage device for allowing a read access of the first data storage device; and

a second address decoder coupled to the second data storage device for allowing a read access of the second data storage device;

characterized in that the first address decoder is arranged to allow a write access of the first data storage device.

2. A reconfigurable electronic device as claimed in claim 1 , characterized in that:

the read access of the first data storage device is enabled during a first phase of the control signal and the write access of the first data storage device is enabled during a second phase of the control signal;

the read access of the second data storage device is enabled during a first phase of the further control signal and a data copy action from the first data storage device to the second storage device is enabled during a second phase of the further control signal;

the first phase of the control signal occurring before the second phase of the control signal.

3. A reconfigurable electronic device as claimed in claim 1 , characterized in that the second data storage device has a second plurality of data storage elements coupled to a first plurality of data storage elements of the first data storage device via a configurable data copy circuit.

4. A reconfigurable electronic device as claimed in claim 3 , characterized in that the data copy circuit comprises a data copy cell for coupling a data storage element from the first data storage device to a further data storage element from the second data storage device, the data copy cell comprising an enable switch coupled to a driver circuit.

5. A reconfigurable electronic device as claimed in claim 1 , characterized in that the first data storage device and the second data storage device are look-up tables.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 7, 2015
From: NXP B.V.
To: III HOLDINGS 6, LLC
Reel/Frame 036304/0330 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2006
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: NXP B.V.
Reel/Frame 018635/0787 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 8, 2005
From: LEIJTEN-NOWAK, KATARZYNA
To: KONNINKLIJKE PHILIPS ELECTRONICS, N.V.
Reel/Frame 016938/0385 →
Priority Claims (1)
EP 02078549 · Aug 29, 2002 · regional
Continuity (1)
Related Publication 20060022704A1 · Feb 2, 2006