IP Library Patent Application 10533062
Patent Application
App. No. 10/533,062

System development method and data processing system

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Quick Facts
Patent No.
US None
App. No.
10/533,062
Abstract

Program descriptions ( 1 ) which define a plurality of devices by employing a program language capable of describing parallel operations are input, the input program descriptions are converted into an intermediate expression (S 2 ), parameters which satisfy a real-time restriction are generated for the intermediate expression (S 3 ), and circuit descriptions which are based on a hardware description language are synthesized on the basis of the generated parameters (S 4 ). The intermediate expression is a concurrent control flow flag, a temporal automaton having a concurrent parameter, or the like. Parametric model checking is performed for the parameter generation. The program descriptions define the devices by using a “run” method, and define the clock synchronizations of the devices by using barrier synchronizations. Thus, a bus system meeting the real-time restriction can be designed.

Claims (13)

1 . A system development method comprising:

a step of inputting program descriptions which define a plurality of devices by employing a program language capable of describing parallel operations;

a step of converting the input program descriptions into an intermediate expression;

a step of generating parameters which satisfy a real-time restriction, for the intermediate expression; and

a step of synthesizing circuit descriptions which are based on a hardware description language, on the basis of the generated parameters.

2 . A system development method as defined in claim 1 , wherein the intermediate expression is a member selected from the group consisting of a concurrent control flow flag, a temporal automaton with a concurrent parameter, and a temporal automaton with parameters.

3 . A system development method as defined in claim 2 , wherein parametric model checking is performed for the parameter generation.

4 . A system development method as defined in claim 3 , wherein the real-time restriction is given by RPCTL.

5 . A system development method as defined in claim 4 , wherein the program descriptions define the devices by using a “run” method, and define clock synchronizations of the devices by using barrier synchronizations.

6 . A data processing system comprising:

a computer;

said computer inputting program descriptions which define a plurality of devices by employing a program language capable of describing parallel operations, converting the input program descriptions into an intermediate expression, generating parameters which satisfy a real-time restriction, for the intermediate expression, and synthesizing circuit descriptions which are based on a hardware description language, on the basis of the generated parameters.

7 . A data processing system as defined in claim 6 , wherein the program descriptions define the devices by using a “run” method and define clock synchronizations of the devices by using barrier synchronizations.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Sep 2, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024927/0153 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 25, 2010
From: TANIMOTO, TADAAKI; KAMADA, MASURAO
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 024135/0248 →