IP Library Granted Patent US 7,443,375
Granted Patent B2
US 7,443,375 · App. 10/534,161 · Granted Oct 28, 2008

Display device with pixel inversion

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Quick Facts
Patent No.
US 7,443,375
App. No.
10/534,161
Granted
Oct 28, 2008
Kind
B2
Abstract

A display device includes pixels arranged in columns and rows, in which the pixels of a row can be selected by means of a row voltage supplied via control lines, and column voltages that correspond to the image data of the selected pixel to be displayed can be supplied via data lines, wherein mutually adjoining pixel groups arranged in a row or column, consisting of adjoining pixels of a row or column, are connected to adjoining control lines or data lines, as applicable, in alternation.

Claims (14)

1. A display device with pixels arranged in columns and rows, in which the pixels of a row can be selected by means of a row voltage supplied via control lines, and column voltages that correspond to the image data of the selected pixel to be displayed can be supplied via data lines, wherein mutually adjoining pixel groups arranged in a row or column, consisting of adjoining pixels of a row or column, are connected to adjoining control lines or data lines, as applicable, in alternation, some of the control lines being connected to a plurality of delay units such that only every other control line is connected to a particular delay unit of the delay units and each of remaining control lines is not connected to any delay unit, the delay units being used to store row voltage values for the control lines connected to the delay units until a clock signal is supplied to the delay units.

2. A display device as claimed in claim 1 , characterized in that a pixel group comprises one pixel.

3. A display device as claimed in claim 1 , characterized in that mutually adjoining pixels of one row are alternately connected to the adjoining control lines.

4. A display device as claimed in claim 1 , characterized in that the pixels comprise switching elements with control terminals which are connected to the control lines and data terminals which are connected to the data lines.

5. A display device as claimed in claim 1 , characterized in that the rows and columns situated at the edges of the display device are covered.

6. A method of controlling a display device as claimed in claim 1 .

7. A display device as claimed in claim 1 , wherein the delay units are D-flip-flops.

8. A display device with pixels arranged in columns and rows, in which the pixels of a row can be selected by means of a row voltage supplied via control lines, and column voltages that correspond to the image data of the selected pixel to be displayed can be supplied via data lines, wherein mutually adjoining pixel groups arranged in a row or column, consisting of adjoining pixels of a row or column, are connected to adjoining control lines or data lines, as applicable, in alternation, some of the data lines being connected to a plurality of delay units such that only every other data line is connected to a particular delay unit of the delay units and each of remaining control lines is not connected to any delay unit, the delay units being used to store column voltage values for the data lines connected to the delay units until a clock signal is supplied to the delay units.

9. A display device as claimed in claim 8 , wherein the delay units are D-flip-flops.

10. A display device as claimed in claim 8 , characterized in that a pixel group comprises one pixel.

11. A display device as claimed in claim 8 , characterized in that mutually adjoining pixels of a column are connected to the adjoining data lines in alternation.

12. A display device as claimed in claim 8 , characterized in that the pixels comprise switching elements with control terminals which are connected to the control lines and data terminals which are connected to the data lines.

13. A display device as claimed in claim 8 , characterized in that the rows and columns situated at the edges of the display device are covered.

14. A method of controlling a display device as claimed in claim 8 .

Assignments (14)
RELEASE OF SECURITY INTEREST Recorded Jun 23, 2021
From: MUFG UNION BANK, N.A.
To: MAXLINEAR, INC.; EXAR CORPORATION; MAXLINEAR COMMUNICATIONS LLC
Reel/Frame 056656/0204 →
SUCCESSION OF AGENCY (REEL 042453 / FRAME 0001) Recorded Jul 1, 2020
From: JPMORGAN CHASE BANK, N.A.
To: MUFG UNION BANK, N.A.
Reel/Frame 053115/0842 →
RELEASE OF SECURITY INTEREST Recorded Sep 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050315/0785 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 21, 2018
From: MAXLINEAR INC; ENTROPIC COMMUNICATIONS LLC
To: DYNAMIC DATA TECHNOLOGIES LLC
Reel/Frame 047128/0295 →
SECURITY AGREEMENT Recorded May 12, 2017
From: MAXLINEAR, INC.; ENTROPIC COMMUNICATIONS, LLC (F/K/A ENTROPIC COMMUNICATIONS, INC.); EXAR CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042453/0001 →
MERGER AND CHANGE OF NAME Recorded May 19, 2015
From: ENTROPIC COMMUNICATIONS, INC.; EXCALIBUR SUBSIDIARY, LLC; ENTROPIC COMMUNICATIONS, LLC
To: ENTROPIC COMMUNICATIONS, LLC
Reel/Frame 035717/0628 →
MERGER AND CHANGE OF NAME Recorded May 18, 2015
From: EXCALIBUR ACQUISITION CORPORATION; ENTROPIC COMMUNICATIONS, INC.; ENTROPIC COMMUNICATIONS, INC.
To: ENTROPIC COMMUNICATIONS, INC.
Reel/Frame 035706/0267 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 3, 2012
From: TRIDENT MICROSYSTEMS, INC.; TRIDENT MICROSYSTEMS (FAR EAST) LTD.
To: ENTROPIC COMMUNICATIONS, INC.
Reel/Frame 028153/0440 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 13, 2010
From: NXP
To: NXP HOLDING 1 B.V.
Reel/Frame 023928/0489 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 13, 2010
From: TRIDENT MICROSYSTEMS (EUROPE) B.V.; NXP HOLDING 1 B.V.
To: TRIDENT MICROSYSTEMS (FAR EAST) LTD.
Reel/Frame 023928/0552 →
RELEASE OF SECURITY INTEREST Recorded Feb 8, 2010
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 023905/0787 →
SECURITY AGREEMENT Recorded Jun 17, 2009
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 022835/0306 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 13, 2008
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: NXP B.V.
Reel/Frame 021085/0959 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 5, 2005
From: KIESCHNICK, KNUT; RZITTKA, ECKART; RADOVIC, MARKO
To: KONINKLIJKE PHILIPS ELECTRONICS N.V.
Reel/Frame 017368/0746 →