IP Library Granted Patent US 7,355,472
Granted Patent B2
US 7,355,472 · App. 10/536,653 · Granted Apr 8, 2008

Method and device for correcting signal distortions in an amplifier device

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Quick Facts
Patent No.
US 7,355,472
App. No.
10/536,653
Granted
Apr 8, 2008
Kind
B2
Abstract

The present invention provides a method for the correction of signal distortions in an amplifier device, wherein a digital PWM modulator is operated with a variable-frequency system clock. The present invention likewise provides a device for the correction of signal distortions in an amplifier device.

Claims (50)

1. A method for correcting signal distortions in an amplifier device, the method comprising:

producing the digital PWM reference signal from the PWM data in a first pulse width modulator, the first pulse width modulator being controlled with a predetermined system clock;

producing a digital PWM signal from the PWM data in a second pulse width modulator, the second pulse width modulator being controlled with a variable-frequency system clock;

amplifying the digital PWM signal;

determining an amplifier deviation from the digital PWM reference signal and an amplified digital PWM signal;

producing a controlled variable from the amplifier deviation in a control device;

feeding the controlled variable to a control input of a variable-frequency device; and

producing the variable-frequency system clock in the variable-frequency device,

wherein the first pulse width modulator and the second pulse width modulator are triggered at a predetermined PWM pulse rate.

2. The method as claimed in claim 1 , further comprising:

producing the PWM data in such a way that with each clock of the predetermined PWM pulse rate, a quantized item of PWM information is calculated; and

further wherein the digital signal comprises a PCM-modulated digital audio signal.

3. The method as claimed in claim 1 , wherein the variable-frequency device comprises one of a group consisting of a voltage controlled oscillator and a current controlled oscillator.

4. The method as claimed in claim 1 , wherein the variable-frequency device is synchronized with the predetermined PWM pulse rate.

5. The method as claimed in claim 1 , wherein at least one of a group consisting of the digital PWM reference signal and the amplified digital PWM signal passes through a filter device before the amplifier deviation is determined.

6. The method as claimed in claim 1 , wherein the amplifier device comprises at least one of a group consisting of an H-bridge circuit and a class-D amplifier.

7. The method as claimed in claim 1 , further comprising:

using the controlled variable to set a frequency of the variable-frequency device in such a way as to minimize a difference between the digital PWM reference signal and the amplified digital PWM signal.

8. The method as claimed in claim 1 , further comprising:

feeding the amplified digital PWM signal to an acoustic sound transducer.

9. The method as claimed in claim 8 , further comprising:

determining the amplifier deviation from the digital PWM reference signal and the amplified digital PWM signal using a loudspeaker signal.

10. The method as claimed in claim 1 , further comprising:

comparing the variable-frequency system clock with the predetermined system clock in a phase detector;

determining a phase difference between the variable-frequency system clock and the predetermined system clock;

filtering the phase difference in a filter device; and

adding the filtered phase difference to the controlled variable to form a modified controlled variable.

11. The method as claimed in claim 10 , further comprising:

filtering the modified controlled variable in an additional filter device; and

applying the filtered modified controlled variable to the control input of the variable-frequency device.

12. The method as claimed in claim 11 , wherein the control input comprises a modulation input.

13. The method as claimed in claim 1 , further comprising:

varying the frequency of the variable-frequency system clock continuously over time.

14. The method as claimed in claim 1 , further comprising:

varying the frequency of the variable-frequency system clock at discrete times.

15. The method as claimed in claim 1 , wherein the PWM data is produced form a digital signal in a digital circuit.

16. A device for correcting signal distortions in an amplifier circuit, the device comprising:

a first pulse width modulator triggered at a predetermined pulse rate and configured to produce a digital PWM reference signal from PWM data;

a second pulse width modulator triggered at the predetermined pulse rate and configured to produce a digital PWM signal from the PWM data, the second pulse width modulator being controlled with a variable-frequency system clock;

an amplifier device for configured to amplify the digital PWM signal;

a device configured to determine an amplifier deviation from the digital PWM reference signal and an amplified digital PWM signal; and

a variable-frequency device configured to produce the variable-frequency system clock based on the amplifier deviation.

17. The device of claim 16 , further comprising:

a control device configured to produce a controlled variable from the amplifier deviation; and

wherein the variable-frequency device produces the variable-frequency system clock from the controlled variable.

18. The device of claim 16 , further comprising a filter device for filtering at least one of a group consisting of the digital PWM reference signal and the amplified digital PWM signal before the amplifier deviation is determined.

19. The device of claim 16 , further comprising:

a phase detector for comparing the variable-frequency system clock and the predetermined system clock in order to determine a phase difference, and

further wherein the phase difference is added to the controlled variable.

20. The device of claim 16 , further wherein a frequency of the variable-frequency system clock is varied continuously over time.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 17, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 053518/0765 →
CONFIRMATORY ASSIGNMENT EFFECTIVE AS OF JANUARY 1, 2018 Recorded Aug 12, 2020
From: INTEL DEUTSCHLAND GMBH
To: INTEL CORPORATION
Reel/Frame 053477/0121 →
CHANGE OF NAME Recorded Nov 6, 2015
From: INTEL MOBILE COMMUNICATIONS GMBH
To: INTEL DEUTSCHLAND GMBH
Reel/Frame 037057/0061 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2012
From: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
To: INTEL MOBILE COMMUNICATIONS GMBH
Reel/Frame 027556/0709 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 18, 2012
From: INFINEON TECHNOLOGIES AG
To: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
Reel/Frame 027548/0623 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 25, 2006
From: KRANZ, CHRISTIAN
To: INFINEON TECHNOLOGIES AG
Reel/Frame 017959/0563 →