IP Library Granted Patent US 7,126,503
Granted Patent B2
US 7,126,503 · App. 10/539,197 · Granted Oct 24, 2006

Digital sampling frequency converter

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Quick Facts
Patent No.
US 7,126,503
App. No.
10/539,197
Granted
Oct 24, 2006
Kind
B2
Abstract

The present invention relates to a converter converting an input digital signal into an output digital signal. Said converter comprises in particular a set of shift registers able to contain samples of the input or output digital signal. It also comprises a calculation unit able to supply a shift signal ( 4 ) to said set of registers. Said calculation unit comprises a first storage unit ( 51 ) able to contain a value of a conversion ratio or of its inverse, so that the value stored is between 0 and 1. It also comprises a second storage unit ( 52 ) able to contain, at a cycle time i+1, i being an integer, a future signal ( 8 ) equal to a sum of a current signal ( 7 ) contained in the second unit at a cycle time i and of the content of the first storage unit. The shift signal then results from an exclusive OR function ( 54 ) between a most significant bit of the current signal ( 71 ) and a most significant bit of the future signal ( 81 ).

Claims (15)

1. A converter for converting an input digital signal into an output digital signal (2), said converter comprising:

a set of shift registers able to contain samples of the input or output digital signal,

a calculation unit able to supply a shift signal to said set of registers and comprising:

a first storage unit able to contain a value of a conversation ratio or of its inverse, so that the stored value is between 0 and 1,

a second storage unit able to contain, at a cycle time i+1, i being an integer, a future signal equal to a sum of a current signal contained in the second unit at a cycle time i and of the content of the first storage unit, the shift signal resulting from an exclusive OR function between a most significant bit of the current signal and a most significant bit of the future signal.

2. A digital television receiver comprising a converter as claimed in claim 1 .

3. A calculation unit able to supply a shift signal to set of shift registers of a converter converting an input digital signal into an output digital signal and comprising:

a first storage unit able to contain a value of a conversion ratio or of its inverse, so that the stored value is between 0 and 1,

a second storage unit able to contain, at a cycle time i+1, i being an integer, a future signal equal to a sum of a current signal contained in the second unit at a cycle time i and of the content of the first storage unit, the shift signal resulting from an exclusive OR function between a most significant bit of the current signal and a most significant bit of the future signal.

4. A calculation unit as claimed in claim 3 , comprising an initialization circuit able to load an initialization signal into the second storage unit at the start of a processing of the input digital signal.

5. A method of converting an input digital signal into an output digital signal, said method comprising the calculation step able to supply a shift to a set of shift registers, itself comprising the substeps of:

storage of a value of a conversion ratio or of its inverse, so that the value stored is between 0 and 1,

addition or subtraction of the value of the value previously stored to or from a current signal initially equal to an initialization signal, resulting from a future signal,

exclusive OR between a most significant bit of the current signal and a most significant bit of the future signal.

6. A computer program able to implement the signal conversion method as claimed in claim 5 , when said program is executed by a processor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 20, 2012
From: IPG ELECTRONICS 503 LIMITED
To: PENDRAGON WIRELESS LLC
Reel/Frame 028594/0224 →