IP Library Granted Patent US 7,634,025
Granted Patent B2
US 7,634,025 · App. 10/544,865 · Granted Dec 15, 2009

Serial radio frequency to baseband interface with programmable clock

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Quick Facts
Patent No.
US 7,634,025
App. No.
10/544,865
Granted
Dec 15, 2009
Kind
B2
Abstract

An interface between an RF processing section and a baseband processing section supports general purpose message transmission as well as satellite positioning system signal sample transmission between the RF processing section and the baseband processing section. The interface includes a bi-directional message serial interface and a data serial interface. The complexity of the data serial interface may be minimized by using a single data bit signal line in the data serial interface.

Claims (32)

1. A method of interfacing a radio frequency (RF) section in a wireless device with a baseband section in the wireless device, the method comprising:

placing a first data bit of a data signal received by the RF section on a single data bit signal line between the RF section and the baseband section;

providing a falling edge of a data clock on a data clock signal line between the RF section and the baseband section;

placing a second data bit of the data signal on the single data bit signal line;

providing a rising edge of the data clock on the data clock signal line;

serially communicating the first data bit and the second data bit to the baseband section on the single data bit signal line; and

serially communicating the falling edge and the rising edge of the clock signal to the baseband section on the data clock signal line; and

repeating the steps of the method for other pairs of data bits to be communicated to the baseband section.

2. The method of claim 1 , wherein the first data bit is a sign bit and the second data bit is a magnitude bit.

3. The method of claim 1 , wherein the wireless device is a satellite positioning system (SPS) receiver.

4. The method of claim 3 , wherein the first data bit, second data bit, and other pairs of data bits are SPS signal samples derived from an SPS input signal received by an antenna connected to the RF section.

5. The method of claim 1 , further including the steps of:

determining whether to send a message over a message serial interface between the RF section and the baseband section;

if a message is to be sent, selecting the message to be sent;

serially placing data bits of the selected message on a serial message data line;

serially placing clock transitions equal in number to the number of data bits placed on the serial message data line; and

transmitting the selected message over the serial message data line.

6. The method of claim 5 , wherein the step of determining whether to send the message is done by a master device.

7. The method of claim 6 , wherein the master device is the baseband section.

8. The method of claim 6 , wherein the step of selecting the message to be sent further includes the step of determining whether to send the message in a fast write mode or a full write mode.

9. The method of claim 8 , wherein the message in the fast write mode consists of 8 bits.

10. The method of claim 8 , wherein the message in the full write mode consists of 32 bits.

11. The method of claim 5 , wherein the message serial interface includes a message clock line, a message-out signal line from the baseband section to the RF section, and a message-in signal line from the RF section to the baseband section.

12. The method of claim 11 , further including the step of transmitting an output bit stream representing a message selected from a predefined RF section message group on the message-in signal line.

13. The method of claim 12 , wherein the predefined RF section message group includes RF section power control messages, RF section test messages, and RF section programmable clock synthesizer messages.

14. The method of claim 13 , wherein the programmable clock synthesizer messages include a reference divider value.

15. The method of claim 14 , wherein the reference divider value is an integer divider value.

16. The method of claim 14 , wherein the reference divider value is a fractional divider value.

17. The method of claim 13 , wherein the predefined RF section message group further includes clock output selection messages for selecting a message clock for the message clock line.

18. The method of claim 11 , further including the step of transmitting an input bit stream representing a message selected from a predefined baseband section message group on the message-out signal line.

19. The method of claim 18 , wherein the predefined baseband section message group includes clock status messages, analog measurement messages, and channel conversion count messages.

20. The method of claim 19 , wherein the analog measurement messages include an analog measurement message for at least one of a plurality of analog input channels.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 14, 2024
From: CSR TECHNOLOGY INC.
To: QUALCOMM INCORPORATED
Reel/Frame 069221/0001 →
CHANGE OF NAME Recorded Dec 22, 2011
From: SIRF TECHNOLOGY, INC.
To: CSR TECHNOLOGY INC.
Reel/Frame 027437/0324 →