IP Library Patent Application 10546615
Patent Application
App. No. 10/546,615

Processor network

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Quick Facts
Patent No.
US None
App. No.
10/546,615
Abstract

Processes are automatically allocated to processors in a processor array, and corresponding communications resources are assigned at compile time, using information provided by the programmer. The processing tasks in the array are therefore allocated in such a way that the resources required to communicate data between the different processors are guaranteed.

Claims (20)

1 . A method of automatically allocating software tasks to processors in a processor array, wherein the processor array comprises a plurality of processors having connections which allow each processor to be connected to each other processor as required, the method comprising:

receiving definitions of a plurality of processes, at least some of said processes being shared processes including at least first and second tasks to be performed in first and second unspecified processors respectively, each shared process being further defined by a frequency at which data must be transferred between the first and second processors; and the method further comprising:

automatically statically allocating the software tasks of the plurality of processes to processors in the processor array, and allocating connections between the processors performing said tasks in each of said respective shared processes at the respective defined frequencies.

2 . A method as claimed in claim 1 , wherein the method is performed at compile time.

3 . A method as claimed in claim 1 , comprising performing said step of allocating the software tasks by means of a computer program.

4 . A method as claimed in claim 1 , further comprising loading software to perform the allocated software tasks onto the respective processors.

5 . A computer software product, which, in operation performs the steps of:

receiving definitions of a plurality of processes, at least some of said processes being shared processes including at least first and second tasks to be performed in first and second unspecified processors of a processor array respectively, each shared process being further defined by a frequency at which data must be transferred between the first and second processors; and

statically allocating the software tasks of the plurality of processes to processors in the processor array, and allocating connections between the processors performing said tasks in each of said respective shared processes at the respective defined frequencies.

6 . A processor array, comprising a plurality of processors having connections which allow each processor to be connected to each other processor as required, and having an associated software product for automatically allocating software tasks to processors in the processor array, the software product being adapted to:

receive definitions of a plurality of processes, each process being defined by at least first and second tasks to be performed in first and second unspecified processors respectively, each process being further defined by a frequency at which data must be transferred between the first and second processors; and to:

automatically allocate the software tasks of the plurality of processes to processors in the processor array, and allocate connections between the processors performing each of said tasks at the respective defined frequencies.

7 . A processor array, comprising;

a plurality of processors,

wherein the processors are interconnected by a plurality of buses and switches which allow each processor to be connected to each other processor as required,

wherein each processor is programmed to perform a respective statically allocated sequence of operations, said sequence being repeated in a plurality of sequence periods,

wherein at least some processes performed in the array involve respective first and second software tasks to be performed in respective first and second processors, and

wherein, for each of said processes, required connections between the processors performing said tasks are allocated at fixed times during each sequence period.

8 . A method as claimed in claim 1 , wherein the frequency at which data must be transferred is defined as a fraction of the available clock cycles.

9 . A method as claimed in claim 8 , wherein the frequency at which data must be transferred can be defined as a fraction ½ n of the available clock cycles, for any value of n such that 2≦2 n ≦s, where s is the number of clock cycles in a sequence period.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2014
From: MINDSPEED TECHNOLOGIES, INC.; MINDSPEED TECHNOLOGIES U.K., LIMITED; MINDSPEED TELECOMMUNICATIONS TECHNOLOGIES DEVELOPMENT (SHENSHEN) CO. LTD.; PICOCHIP (BEIJING) TECHNOLOGY COMPANY LIMITED
To: INTEL CORPORATION
Reel/Frame 032372/0154 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2007
From: DULLER, ANDREW; PANESAR, GAJINDER; GRAY, ALAN; CLAYDON, ANTHONY PETER JOHN; ROBBINS, WILLIAM PHILIP
To: PICOCHIP DESIGNS LIMITED
Reel/Frame 018780/0797 →
SECURITY AGREEMENT Recorded Sep 29, 2006
From: PICOCHIP DESIGNS LIMITED
To: ETV CAPITAL S.A.
Reel/Frame 018329/0480 →