IP Library Granted Patent US 7,343,547
Granted Patent B2
US 7,343,547 · App. 10/549,118 · Granted Mar 11, 2008

Semiconductor integrated circuit, and semiconductor system including that semiconductor integrated circuit

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Quick Facts
Patent No.
US 7,343,547
App. No.
10/549,118
Granted
Mar 11, 2008
Kind
B2
Abstract

For detecting a failure of a logic circuit 11 provided in a semiconductor integrated circuit due to deterioration with age, or the like, there is provided a reference-producing circuit 12 using a logic different from the logic of the logic circuit 11 . The reference-producing circuit 12 produces an abnormal/normal determination reference S for a predetermined output signal out output from the logic circuit 11 . The reference-producing circuit 12 is made from only a portion of the logic of the logic circuit 11 or with a logic totally different from the logic of the logic circuit 11 to produce the determination reference S, so that the circuit scale of the reference-producing circuit 12 is smaller than that of the logic circuit 11 . The determination reference S from the reference-producing circuit 12 and the output signal out from the logic circuit 11 are compared with each other by a determination circuit 13.

Claims (17)

1. A semiconductor integrated circuit, comprising:

a logic circuit producing at least a predetermined output signal with a logic and outputting the predetermined output signal;

a reference-producing circuit for producing a determination reference for the predetermined output signal, wherein the reference-producing circuit is made from a different logic from the logic of the logic circuit and with a smaller circuit scale than that of the logic circuit; and

a determination circuit for receiving a determination reference produced by the reference-producing circuit to detect an abnormality in the predetermined output signal from the logic circuit based on the determination reference, wherein if an abnormality is detected, the determination circuit determines that the logic circuit has failed and outputs an error signal.

2. The semiconductor integrated circuit of claim 1 , wherein the reference-producing circuit produces the determination reference with the same logic as a portion of the logic of the logic circuit.

3. The semiconductor integrated circuit of claim 1 , wherein the reference-producing circuit produces the determination reference with a logic totally different from the logic of the logic circuit.

4. The semiconductor integrated circuit of claim 1 , wherein:

the reference-producing circuit also produces a determination period signal specifying a period during which the detection of an abnormality in the predetermined output signal from the logic circuit should be performed; and

the determination circuit performs the detection of an abnormality in the predetermined output signal from the logic circuit based on the determination reference from the reference-producing circuit only while the determination period signal is being output.

5. The semiconductor integrated circuit as in any one of claims 1 to 4 , comprising a conversion circuit for, in response to the error signal output from the determination circuit, externally outputting the determination reference produced by the reference-producing circuit as the predetermined output signal, instead of the predetermined output signal from the logic circuit.

6. The semiconductor integrated circuit as in any one of claims 1 to 4 , comprising:

a CPU for operating the logic circuit; and

an interruption circuit for halting an operation of the CPU in response to the error signal output from the determination circuit.

7. A semiconductor system, comprising:

the semiconductor integrated circuit as in any one of claims 1 to 4 ;

a CPU for operating the logic circuit provided in the semiconductor integrated circuit; and

an interruption circuit for halting an operation of the CPU in response to the error signal output from the determination circuit provided in the semiconductor integrated circuit.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 26, 2014
From: PANASONIC CORPORATION
To: COLLABO INNOVATIONS, INC.
Reel/Frame 033021/0806 →
LIEN Recorded Jan 13, 2014
From: COLLABO INNOVATIONS, INC.
To: PANASONIC CORPORATION
Reel/Frame 031997/0445 →
CHANGE OF NAME Recorded Jan 8, 2014
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 031947/0358 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2006
From: AIBA, KIMIHIKO; MAE, YOICHIRO; YOSHIDA, HISATO
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 018525/0938 →